Granted Patent B2

US 7,319,363 · App. 10/554,889 · Granted Jan 15, 2008

Abstract

Claims (40)

1. A method for controlling amplification within a receiver ( 1 ) comprising:

setting the gain of a variable gain amplifier ( 3 ) which amplifies an input signal ( 10 ) to obtain a gain-controlled signal ( 12 );

analog-to-digital converting ( 6 ) said gain controlled signal ( 12 ) thereby generating digital words ( 15 , 20 ) each digital word having a value of a plurality possible digital values;

counting digital words having a value within a first subset (S 1 ) of possible digital values thereby generating a first counter value ( 51 ); said counted digital words belonging to a predetermined number of digital words; said first subset (S 1 ) comprising at least one value;

characterized by

counting ( 52 , 53 , 54 ) digital words having a value within a second subset (S 2 , S 3 , S 4 ) of possible digital values thereby generating a second counter value;

said counted digital words belonging to said predetermined number of digital words; said second subset being different from said first subset; said second subset comprising at least one value; and

setting said gain in accordance with the first and second counter value in a fashion that all counter values are as equal as possible.

2. The method of claim 1 , wherein each subset comprises at least two possible digital values.

3. The method of claim 1 or 2 , said setting further comprising:

summing all counter values ( 70 ) in order to obtain a uniformity parameter; and

setting ( 8 , 18 ) said gain in order to minimize said uniformity parameter.

4. The method of claim 1 or 2 , said setting further comprising:

subtracting a value ( 24 , 55 , 56 , 57 , 58 ) from each counter value ( 25 , 51 , 52 , 53 , 54 ) in order to obtain difference values ( 26 ); and

summing the absolute values of all said difference values in order to obtain a uniformity parameter; and

setting ( 8 , 18 ) said gain in order to minimize said uniformity parameter.

5. The method of claim 1 , characterized in that the absolute difference between any value within said first subset ( 42 ) and an average of all possible digital values is greater than the absolute difference between any value within said second subset ( 41 ) and said average and

said setting said gain further comprising:

increasing said amplification with the count of said first counter ( 51 ) is greater than the count of said second counter ( 52 , 53 , 54 ); and

decreasing said amplification if the count of said first counter is smaller than the count of said second counter.

6. The method of claim 5 , said setting said gain further comprising:

calculating the difference of the first counter value minus the second counter value;

adding an offset to said difference in order to obtain a uniformity parameter;

said gain is increased or decreased by a value proportional to said uniformity parameter.

7. A circuit to be used within a receiver comprising:

a variable gain amplifier ( 3 ) for receiving an analog signal and outputting a gain controlled signal ( 12 );

an analog-to-digital converter ( 6 ) connected to said variable gain amplifier ( 3 ) for digitizing said gain controlled signal, thereby generating digital words, each digital word having a value out of a plurality of possible digital values;

a first counter ( 51 ) connected to said analog-to-digital converter for counting digital words having a value within a first subset of possible digital values; said counted digital words belonging to a predetermined number of digital words; said first subset (S 1 ; 41 ) comprising at least one value;

characterized by:

a second counter ( 52 , 53 , 54 ) connected to said analog-to-digital converter ( 6 ) for counting digital words having a value within a second subset (S 2 , S 3 , S 4 ; 42 ) of possible digital values; said counted digital words belonging to said predetermined number of digital words; said second subset (S 2 , S 3 , S 4 ; 42 ) being different from said first subset (S 1 ; 41 ); said second subset comprising at least one value; and

a gain calculation circuit ( 75 ) for setting said gain in accordance with the values of said first and second counters in a fashion that said values of said counters are as equal as possible.

8. A circuit of claim 7 , further comprising an adder ( 70 ) which is connected to each of said counters for adding the counter values; said adder ( 70 ) providing its output to said gain calculation circuit ( 75 ) which sets said gain in accordance with the output signal of said adder ( 70 ).

9. The circuit of claim 7 , further comprising:

a first register ( 55 );

a second register ( 56 , 57 , 58 );

a first absolute difference circuit ( 59 ) being connected to said first counter ( 51 ) and said first register ( 55 ) for calculating the absolute difference between the value of said first counter ( 51 ) and the value stored in said first register ( 55 )

a second absolute difference circuit ( 60 , 61 , 62 ) being connected to said second counter ( 52 , 53 , 54 ) and said second register ( 56 , 57 , 58 ) for calculating the absolute difference between the value of said second counter ( 52 , 53 , 54 ) and the value stored in said second register ( 56 , 57 , 58 ); and

an adder ( 70 ) connected to each of said absolute difference circuits ( 59 , 60 , 61 , 62 ) for adding said absolute differences; said adder ( 70 ) providing its output to said gain calculating a circuit ( 75 ) which sets said gain in accordance with the output provided by said adder ( 70 ).

10. A circuit of claim 7 , characterized in that the absolute difference between any value within a said first subset ( 41 ) and an average of all possible digital values smaller than the absolute difference between any value within said second subset ( 42 ) and said average and said circuit further comprising a subtractor for calculating the difference of said first counter value minus said second counter value;

said subtractor providing its output to said gain calculating circuit ( 75 ) for setting said gain in accordance with the output of said subtractor.

Assignments (8)