Video processing device with low memory bandwidth requirements
View Patent ↗The present invention relates to a video processing device for processing data corresponding to a sequence of pictures according to a predictive block-based encoding technique. Said device comprises a processing unit ( 20 ) including a reconstruction circuit ( 16 ) for reconstructing pictures from decoded data and an external memory ( 1 ) for storing reference pictures delivered by the reconstruction circuit. The processing unit further comprises a memory controller ( 11 ) for controlling data exchange between the processing unit and the external memory, a cache memory ( 17 ) for temporarily storing data corresponding to a prediction area, said data being read out from the external memory via the memory controller, and a motion compensation circuit ( 14 ) for delivering motion compensated data to the reconstruction circuit on the basis of the prediction area read out from the cache memory.
1. A video processing device for processing data corresponding to a sequence of pictures according to a predictive block-based encoding technique, said device comprising:
a processing unit including a reconstruction circuit for reconstructing pictures from decoded data,
an external memory for storing reference pictures delivered by the processing unit,
the processing unit further comprising:
a memory controller for controlling data exchange between the processing unit and the external memory,
a cache memory for temporarily storing data corresponding to a prediction area, said data being read out from the external memory via the memory controller, and
a motion compensation circuit for delivering motion compensated data to the reconstruction circuit on the basis of the prediction area read out from the cache memory;
said device being configured to:
divide the data corresponding to the prediction area within the cache memory into zones of equal size;
determine a subset of the zones that contain pixels corresponding to an image to be retrieved, and
retrieve, during decoding, only the subset from the external memory to the cache memory;
wherein bandwidth required to retrieve the image is reduced as a function of a quantity of the zones that are not retrieved based on failure to contain the corresponding pixels.
2. A video processing device as claimed in claim 1 , wherein the processing unit is a decoding unit for decoding an encoded data stream corresponding to a sequence of encoded pictures.
3. A video processing device as claimed in claim 1 , wherein the processing unit is an encoding unit for encoding an input data stream corresponding to a sequence of pictures.
4. A video processing device as claimed in claim 1 , wherein the processing unit is a transcoding unit for transcoding a first encoded data stream corresponding to a sequence of encoded pictures into a second encoded data stream.
5. A video processing device as claimed in claim 1 , wherein the memory controller is able to fetch automatically the data corresponding to a complete prediction area from the external memory to the cache memory.
6. A video processing device as claimed in claim 5 , wherein the memory controller is able to fetch data corresponding to a zone from the external memory to the cache memory upon request of the processing unit.
7. A video processing device as claimed in claim 6 , wherein the cache memory is adapted to receive the prediction areas of two reference pictures.
8. A video processing device as claimed in claim 7 , wherein the cache memory is adapted to receive the prediction area of a past reference picture, the prediction area of a future reference picture being read out from the external memory.
9. A video processing device as claimed in claim 8 , wherein the cache memory is adapted to receive luminance components of the prediction area of at least one reference picture.
10. A video processing device as claimed in claim 1 , wherein the cache memory is divided into equal zones, and the memory controller is able to fetch data corresponding to a zone from the external memory to the cache memory upon request of the processing unit.
11. A video processing device as claimed in claim 1 , wherein the cache memory is adapted to receive the prediction areas of two reference pictures.
12. A video processing device as claimed in claim 1 , wherein the cache memory is adapted to receive the prediction area of a past reference picture, the prediction area of a future reference picture being read out from the external memory.
13. A video processing device as claimed in claim 1 , wherein the cache memory is adapted to receive luminance components of the prediction area of at least one reference picture.
14. A video processing method for processing data corresponding to a sequence of pictures according to a predictive block-based encoding technique, said method comprising the steps of:
reconstructing pictures from decoded data;
storing reference pictures delivered by the reconstruction step in an external memory;
temporarily storing data corresponding to a prediction area in a cache memory, said data being read out from the external memory via a memory controller;
dividing the data corresponding to the prediction area within the cache memory into zones of equal size;
determining a subset of the zones that contain pixels corresponding to an image to be retrieved, and
retrieving only the subset from the external memory to the cache memory; and
performing motion compensation, including delivery of motion compensated data to the reconstruction step on the basis of the prediction area read out from the cache memory;
wherein bandwidth required to retrieve the image is reduced as a function of a quantity of the zones that are not retrieved based on failure to contain the corresponding pixels.