IP Library Granted Patent US 7,384,814
Granted Patent B2
US 7,384,814 · App. 10/557,623 · Granted Jun 10, 2008

Field effect transistor including an organic semiconductor and a dielectric layer having a substantially same pattern

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Quick Facts
Patent No.
US 7,384,814
App. No.
10/557,623
Granted
Jun 10, 2008
Kind
B2
Abstract

Provided is a method of manufacturing a field effect transistor with an organic semiconductor, and particularly a device comprising a plurality of field effect transistors with an interconnect structure. Herein, use is made of three photolithographical masks for four layers. Thereto, the transistor is provided in a top-gate structure, and the organic semiconductor layer ( 307 ) and the dielectric layer ( 309 ) are structure and patterned together. The semiconductor layer ( 307 ) and the dielectric layer ( 309 ) may be removed from areas not associated with field effect transistors ( 300 ) or with crossing conductors of the first and second conductor layer ( 303, 305, 501 ).

Claims (20)

1. A method of manufacturing an electronic device, in which method at least one field effect transistor is provided on a substrate, which provision of the at least one field effect transistor comprises the steps of:

applying a patterned, first conductor layer on the substrate;

applying an organic semiconductor layer on the first conductor layer;

applying a dielectric layer on the semiconductor layer;

patterning the organic semiconductor layer and the dielectric layer together; and

applying a patterned second conductor layer on the patterned dielectric layer.

2. A method as claimed in claim 1 wherein the step of patterning the organic semiconductor layer and the dielectric layer comprises removing the organic semiconductor layer and the dielectric layer from areas not associated with the at least one field effect transistor and from areas not associated with crossing conductors of the first and second conductor layer.

3. A method as claimed in claim 1 wherein the step of applying an organic semiconductor layer on the first conductor layer comprises applying an organic semiconductor or a precursor thereof by spin coating.

4. A method as claimed in claim 1 wherein the dielectric layer comprises an initiator sensitive for actinic radiation and functions after irradiation as a mask for the patterning of the semiconductor layer.

5. A method as claimed in claim 1 , comprising the additional step of providing an electro-optical layer so as to provide a display arrangement.

6. A method as claimed in claim 2 , wherein the said areas associated with a field effect transistor and/or the said areas associated with crossing conductors include protection zones providing a minimal lateral distance between a first conductor in the first conductor layer and a second conductor in the second conductor layer.

7. A method as claimed in claim 3 , wherein the dielectric layer comprises a photoresist material.

8. A method as claimed in claim 7 wherein the substrate is substantially transparent.

9. An electronic device comprising a plurality of field effect transistor on a substrate and an interconnect structure so as to connect the transistors mutually and/or to an output terminal, the fleid effect transistors and at least part of the interconnect structure being provided in a stack of:

a patterned first conductor layer applied on the substrate;

an organic semiconductor layer applied on the first conductor layer;

a dielectric layer applied on the semiconductor layer;

a patterned second conductor layer applied on the dielectric layer;

wherein the semiconductor layer and the dielectric layer are provided in a substantially identical pattern.

10. An electronic device as claimed in claim 9 , wherein the semiconductor layer and the dielectric layer are absent from areas not associated with the field effect transistors and from areas not associated with crossing conductors of the first and second conductor layer.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 22, 2016
From: CREATOR TECHNOLOGY B.V.
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 038214/0991 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 31, 2011
From: POLYMER VISION LIMITED
To: CREATOR TECHNOLOGY B.V.
Reel/Frame 026365/0552 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 15, 2007
From: KONINKLIJKE PHILIPS ELECTRONICS N.V.
To: POLYMER VISION LIMITED
Reel/Frame 019698/0562 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 17, 2005
From: HUITMA, HJALMAR; HUISMAN, BART-HENDRIK
To: KONINKLIJKE PHILIPS ELECTRONICS N.V.
Reel/Frame 017973/0843 →