Image signal processing device
An image signal processing device has an LSI including a ROM access control circuit for holding data for controlling an operation of a video signal processing unit, and a flush ROM that is disposed outside the LSI, holds control data to be transmitted to the ROM access control circuit, and allows data read to be controlled by the ROM access control circuit. The data transferred between the flush ROM and the ROM access control circuit has data that must be updated every field and data that does not need to be updated every field. The data is transferred in a vertical blanking time period of the video output data. This configuration allows certain transfer of required data using the vertical blanking time period.
1 . An image signal processing device comprising:
a semiconductor integrated circuit having:
a video signal processing unit for outputting video output data to a display device; and
a control unit for holding data for controlling an operation of the video signal processing unit; and
an external memory that is disposed outside the semiconductor integrated circuit, holds control data to be fed to the control unit, and allows data read to be controlled by the control unit,
wherein data transferred between the external memory and the control unit has data that must be updated every field and data that does not need to be updated every field, and is transferred in a vertical blanking time period of the video output data, and
the data that does not need to be updated every field is divided into a plurality of data, assigned to a plurality of fields, and transferred.
2 . The image signal processing device according to claim 1 ,
wherein the video signal processing unit has a memory for holding the data that must be updated every field and a memory for holding the data that does not need to be updated every field.