IP Library Granted Patent US 7,718,549
Granted Patent B2
US 7,718,549 · App. 10/566,984 · Granted May 18, 2010

Method of making a polymer device

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Quick Facts
Patent No.
US 7,718,549
App. No.
10/566,984
Granted
May 18, 2010
Kind
B2
Abstract

A method of making a transistor having first and second electrodes, a semiconductive layer, and a dielectric layer; said semiconductive layer comprising a semiconductive polymer and said dielectric layer comprising an insulating polymer; characterised in that said method comprises the steps of: (i) depositing on the first electrode a layer of a solution containing material for forming the semiconductive layer and material for forming the dielectric layer; and (ii) optionally curing the layer deposited in step (i); wherein, in step (i), the solvent drying time, the temperature of the first electrode and the weight ratio, of (material for forming the dielectric layer): (material for forming the semiconductive layer) in the solution are selected so that the material for forming the semiconductive layer and the material for forming the dielectric layer phase separate by self-organisation to form an interface between the material for forming the semiconductive layer and the material for forming the dielectric layer.

Claims (32)

1. A method of making a transistor having first and second electrodes, a semiconductive layer, and a dielectric layer; said semiconductive layer comprising a semiconductive polymer and said dielectric layer comprising an insulating polymer; characterised in that said method comprises the steps of:

(i) depositing on the first electrode a layer of a solution, said solution comprising material for forming the semiconductive layer and material for forming the dielectric layer; and

(ii) optionally curing the layer deposited in step (i);

wherein, in step (i), the solvent drying time, the temperature of the first electrode and the weight ratio of (material for forming the dielectric layer): (material for forming the semiconductive layer) in the solution are selected so that the material for forming the semiconductive layer and the material for forming the dielectric layer phase separate by self-organisation to form an interface between the material for forming the semiconductive layer and the material for forming the dielectric layer; and

wherein said solution comprises a diblock polymer, said diblock polymer comprising a semiconductive block for forming the semiconductive layer and a dielectric block for forming the dielectric layer.

2. A method according to claim 1 , wherein the weight ratio of (material for forming the dielectric layer): (material for forming the semiconductive layer) is in the range of from 0.5 to 2.

3. A method according to claim 1 , wherein the solvent drying time is in the range of from 0.1 to 100 s.

4. A method according to claim 1 , wherein the material for forming the semiconductive layer comprises one or more aromatic or heteroaromatic structural units.

5. A method according to claim 4 , wherein the one or more aromatic or heteroaromatic units independently are selected from the group consisting of fluorenedyil, phenylene, phenylene vinylene, triarylamine, thiophenediyl, thiophene, oxadiazole and benzothiadiazole.

6. A method according to claim 1 , wherein the material for forming the dielectric layer comprises crosslinkable groups.

7. A method according to claim 1 , wherein the material for forming the dielectric layer comprises one or more units having a low cohesive-energy density.

8. A method according to claim 7 , wherein the one or more units having a low cohesive-energy density are selected from the group consisting of siloxane, perfluoroalkyl, perfluoroarylene ether, perfluoroalkylene ether.

9. A method according to claim 7 , wherein the material for forming the dielectric layer has a surface tension in the range of from 15 to 35 dyn/cm.

10. A method according to claim 1 , wherein the transistor is in top-gate configuration.

11. A method according to claim 1 , wherein the transistor is in bottom-gate configuration.

12. A method according to claim 11 , wherein the material for forming the dielectric layer comprises one or more units having high affinity for the first electrode.

13. A method according to claim 11 , wherein the first electrode is surface treated prior to step (i) with a material containing one or more units having a high affinity for the first electrode.

14. A method according to claim 1 , wherein the thickness of the dielectric layer is below 400 nm.

15. A method according to claim 1 , wherein the thickness of the semiconductive layer is in the range of 10 nm to 300 nm.

16. A method according to claim 1 , wherein the transistor is a field-effect transistor.

17. A method according to claim 1 , wherein the transistor is a phototransistor.

18. A transistor obtainable by the method as defined in claim 1 .

19. A method of making a transistor having first and second electrodes, a semiconductive layer, and a dielectric layer; said semiconductive layer comprising a semiconductive polymer and said dielectric layer comprising an insulating polymer; characterised in that said method comprises steps of:

(i) depositing on the first electrode a layer of a solution, said solution comprising material for forming the semiconductive layer and material for forming the dielectric layer; and

(ii) optionally curing the layer deposited in step (i);

wherein, in step (i), the solvent drying time, the temperature of the first electrode and the weight ratio of (material for forming the dielectric layer): (material for forming the semiconductive layer) in the solution are selected so that the material for forming the semiconductive layer and the material for forming the dielectric layer phase separate by self-organization to form an interface between the material for forming the semiconductive layer and the material for forming the dielectric layer,

wherein the material for forming the dielectric layer is mixed with the material for forming the semiconductive layer in the solution.

20. A method according to claim 19 , wherein the material for forming the dielectric layer comprises oligomers and/or monomers for forming the insulating polymer and the material for forming the semiconductive layer comprises a semiconductive polymer and/or oligomers for forming the semiconductive polymer.

21. A method according to claim 19 , wherein the material for forming the dielectric layer comprises an insulating polymer and the material for forming the semiconductive layer comprises a semiconductive polymer and/or oligomers for forming the semiconductive polymer.

22. A method of making an electric or optoelectronic device comprising a transistor made according to the method of claim 19 .

23. A method according to claim 22 , wherein the electronic or optoelectronic device comprises an RF tag, electronic paper, chemical sensor, logic circuit, amplifier, or driver circuit.

24. An electronic or optoelectronic device obtainable by the method as defined in claim 22 .

Assignments (7)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 13, 2023
From: CAMBRIDGE ENTERPRISE LIMITED
To: FLEXENABLE LIMITED
Reel/Frame 062958/0246 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 13, 2023
From: FLEXENABLE LIMITED (IN ADMINISTRATION)
To: FLEXENABLE TECHNOLOGY LIMITED
Reel/Frame 062959/0843 →
LICENSE Recorded Oct 21, 2015
From: CAMBRIDGE ENTERPRISE LIMITED
To: PLASTIC LOGIC LIMITED
Reel/Frame 036912/0416 →
RELEASE OF SECURITY INTEREST Recorded May 12, 2011
From: STATE CORPORATION "RUSSIAN CORPORATION OF NANOTECHNOLOGIES"
To: PLASTIC LOGIC LIMITED
Reel/Frame 026271/0377 →
SECURITY AGREEMENT Recorded Aug 3, 2010
From: PLASTIC LOGIC LIMITED
To: STATE CORPORATION "RUSSIAN CORPORATION OF NANOTECHNOLOGIES"
Reel/Frame 024776/0357 →
CHANGE OF NAME Recorded Nov 8, 2007
From: CAMBRIDGE UNIVERSITY TECHNICAL SERVICES LTD
To: CAMBRIDGE ENTERPRISE LTD
Reel/Frame 020109/0089 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 21, 2006
From: CHUA, LAY-LAY; HO, PETER KIAN-HOON; SIRRINGHAUS, HENNING; FRIEND, RICHARD HENRY
To: CAMBRIDGE UNIVERSITY TECHNICAL SERVICES LIMITED
Reel/Frame 018356/0001 →