IP Library Granted Patent US 7,464,256
Granted Patent B2
US 7,464,256 · App. 10/572,665 · Granted Dec 9, 2008

Bios protection device preventing execution of a boot program stored in the bios memory until the boot program is authenticated

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Quick Facts
Patent No.
US 7,464,256
App. No.
10/572,665
Granted
Dec 9, 2008
Kind
B2
Abstract

A processing system including a bios protection device and method of protecting a bios is provided. The system comprises a central processor ( 11 ), and a BIOS memory device ( 18 ) to which the BIOS protection device ( 17 ) is interconnected by address and data paths ( 16 ). At start-up, the BIOS protection device ( 17 ) takes control of the memory address and data paths ( 16 ) and prevents execution of a boot program stored in the BIOS memory device ( 18 ) until the BIOS protection device ( 17 ) has verified that the boot program stored in the BIOS memory device ( 18 ) is authentic. The BIOS protection device ( 17 ) is connected to the processing system between a central processor ( 11 ) and the BIOS memory device ( 18 ), and includes address and data path interface connection means ( 24, 25 ), and an authentication processor ( 21 ). When power is applied to the BIOS protection device ( 17 ), the BIOS protection device ( 17 ) takes control of address and data path(s) ( 16 ) to which it is connected and the authentication processor ( 21 ) interrogates the BIOS memory device ( 18 ) connected to the address and data path(s) ( 16 ) to determine if the boot program contained in the BIOS memory device ( 18 ) is authentic. Only if the boot program is determined to be authentic does the BIOS protection device ( 17 ) release control of the address and data path(s) ( 16 ) to permit the central processor ( 11 ) to execute the boot program.

Claims (16)

1. A processing system comprising:

a central processor;

a BIOS memory device storing a boot program;

a BIOS protection device;

a plurality of memory address and data paths to provide communication between at least the processor, BIOS memory device and BIOS protection device;

said BIOS protection device configured to verify the boot program and control the memory address and data paths and prevent execution of the boot program until said verification,

wherein the BIOS protection device also contains an internal memory device and is configured to, while authenticating the BIOS memory device contents, copy at least part of the BIOS memory device contents to the internal memory device and control the address and data path(s) to bypass the BIOS memory device and communicate with the internal memory device when the central processor attempts to access the copied part of the BIOS memory device contents.

2. A method of authenticating a boot program held in a BIOS memory device of a processing system comprising a central processor, the BIOS memory device and a BIOS protection device interconnected by address and data paths, the method comprising:

1) at start-up, the BIOS protection device temporarily prevents execution of the boot program by the central processor;

2) the BIOS protection device takes control of the address and data paths;

3) the BIOS protection device interrogates the contents of the BIOS memory device to establish if the contents are authenticated;

4) if the contents of the BIOS memory device are not authentic, the BIOS protection device contents to prevent execution of the boot program and prevents further operation of the central processor; and

5) if the contents of the BIOS memory device are authentic, the BIOS protection device relinquishes control of the address and data paths and allows the central processor to execute the boot program in the BIOS memory device

wherein the BIOS protection device also contains an internal memory device and while authenticating the BIOS memory device contents, the BIOS protection device copies at least part of the BIOS memory device contents to the internal memory device and subsequently controls the address and data path(s) to bypass the BIOS memory device and communicate with the internal memory device instead when the central processor attempts to access the copied part of the BIOS memory device contents.

3. A BIOS protection device for connection to a processing system between a central processor and a BIOS memory device containing a boot program, the BIOS protection device including address and data path interface connections, and an authentication processor whereby, when power is applied to the BIOS protection device, the BIOS protection device takes control of address and data path(s) to which it is connected and the authentication processor interrogates the BIOS memory device connected to the address and data path(s) to determine if the boot program contained in the BIOS memory device is authentic, and only if the boot program is determined to be authentic does the BIOS protection device release control of the address and data path(s) to permit the central processor to execute the boot program

wherein the BIOS protection device also contains an internal memory device and while authenticating the BIOS memory device contents, the BIOS protection device copies at least part of the BIOS memory device contents to the internal memory device and subsequently controls the address and data path(s) to bypass the BIOS memory device and communicate with the internal memory device instead when the central processor attempts to access the copied part of the BIOS memory device contents.

Assignments (6)
RELEASE (REEL 060204 / FRAME 0216) Recorded Mar 2, 2026
From: BANK OF AMERICA, N.A.
To: ARISTOCRAT TECHNOLOGIES AUSTRALIA PTY LTD
Reel/Frame 074989/0657 →
NOTICE OF ASSIGNMENT OF SECURITY INTEREST Recorded May 27, 2022
From: UBS AG, STAMFORD BRANCH
To: BANK OF AMERICA, N.A.
Reel/Frame 060204/0216 →
RELEASE OF SECURITY INTEREST Recorded Mar 16, 2022
From: UBS AG, STAMFORD BRANCH
To: ARISTOCRAT TECHNOLOGIES AUSTRALIA PTY LIMITED
Reel/Frame 059368/0799 →
SECURITY INTEREST Recorded Jun 3, 2020
From: ARISTOCRAT TECHNOLOGIES AUSTRALIA PTY LIMITED
To: UBS AG, STAMFORD BRANCH, AS SECURITY TRUSTEE
Reel/Frame 052828/0001 →
PATENT SECURITY AGREEMENT Recorded Jan 16, 2015
From: ARISTOCRAT TECHNOLOGIES AUSTRALIA PTY LIMITED
To: UBS AG, STAMFORD BRANCH
Reel/Frame 034777/0498 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 30, 2008
From: MUIR, ROBERT LINLEY
To: ARISTOCRAT TECHNOLOGIES AUSTRALIA PTY LTD.
Reel/Frame 021609/0261 →