Phase-switching dual modulus prescaler

1. Phase-switching dual modulus prescaler, comprising a dual modulus divider ( 10 ) comprising:

a first and second divide-by-2 circuit (A;B), wherein said second divide-by-2 circuit (B) is coupled to the output of said first divide-by-2 circuit (A) and at least said second divide-by-two circuit (B) comprises four phase outputs (I p , I n , Q p , Q n ; INi, IiNni, INq, INnq) each separated by 90°;

a phase selection unit (PSU) for selecting one of the four phase outputs (I p , I n , Q p , Q n ; INi, INni, INq, INnq) of the second divide-by-2 circuit (B);

a phase control unit (RTU) for providing control signal (C 1 , NC 0 ; C 2 , NC 2 ; C 3 , NC 3 ) to the phase selection unit (PSU), wherein the phase selection unit (PSU) performs the selection of the four phase outputs (I p , I n , Q p , Q n ; INi, INni, INq, INnq) according to the control signals (C 0 , NC 0 ; C 1 , NC 1 ; C 2 , NC 2 ); and

said phase selection unit (PSU) is implemented based on direct logic;

wherein the output (OUT) of the phase selection unit (PSU) is implemented according to the following logic code:

OUT= NC 0 •NC 1•IN i + NC 0 •C 1•IN ni + C 0 •NC 2•IN nq + C 0 •C 2•IN q ,

+, •, represent an OR-, AND, and NAND functions, respectively.

2. Prescaler according to claim 1 , further comprising

a divide-by-4 circuit (UA) coupled to the output of the phase selection unit (PSU), said divide-by-4 circuit (UA) comprises a sixth and seventh divide-by-2 circuit (F,G) each with four phase outputs (I p , I n , Q p , Q n ) separated by 90°, said seventh divide-by-2 circuit (G) being coupled to the quadrature output (Q p , Q n ) of the sixth divide-by-2.

3. Prescaler according to claim 1 , wherein

the phase control unit (RTU) comprises a fourth and fifth divide-by-2 circuit (D, E) each with four phase outputs (I p , I n , Q p , Q n ) separated by 90°, said fourth and fifth divide-by-2 circuit (D, E) being coupled in series,

the In-phase output signal (I p , I n ) of the fifth divide-by-2 circuit (E) corresponds to the control signal (C 0 ),

the In-phase output signal (I p , I n ) of the fourth divide-by-2 circuit (D) corresponds to the control signal (C 1 ),

the quadrature phase output signal (Q p , Q n ) of the fourth divide-by-2 circuit (E) corresponds to the control signal (C 2 ).

4. Prescaler according to claim 3 , wherein

the phase control unit (RTU) further comprises a D-latch (DL) coupled to the input of the fifth divide-by-2 circuit (E),

the D-latch (DL) receives the previous state of the In-phase output (I p , I n ) of the seventh divide-by-2 circuit (G) and a signal (modul) indicating the number of phase switching as input signals.

5. Prescaler according to claim 1 , wherein said dual modulus divider ( 10 ) is a 16/17 divider.

6. Prescaler according to claim 1 , further comprising a synchronization loop coupled to the dual modulus divider ( 10 ) for reclocking the dual modulus divider ( 10 ).

7. Frequency synthesizer comprising a prescaler according to claim 1 .

8. Phase-switching dual modulus prescaler, comprising a dual modulus divider ( 10 ) comprising:

a first and second divide-by-2 circuit (A;B), wherein said second divide-by-2 circuit (B) is coupled to the output of said first divide-by-2 circuit (A) and at least said second divide-by-two circuit (B) comprises four phase outputs (I p , I n , Q p , Q n ; INi INni, INq, INnq) each separated by 90°;

a phase selection unit (PSU) for selecting one of the four phase outputs (I p , I n , Q p , Q n ; INi, INni, INq, INnq) of the second divide-by-2 circuit (B);

a phase control unit (RTU) for providing control signal (C 1 , NC 0 ; C 2 , NC 2 ; C 3 , NC 3 ) to the phase selection unit (PSU), wherein the phase selection unit (PSU) performs the selection of the four phase outputs (I p , I n , Q p , Q n ; INi, INni, INq, INnq) according to the control signals (C 0 , NC 0 ; C 1 , NC 1 ; C 2 , NC 2 ); and

said phase selection unit (PSU) is implemented based on direct logic;

wherein

the phase control unit (RTU) comprises a fourth and fifth divide-by- 2 circuit (D, E) each with four phase outputs (I p , I n , Q p , Q n ) separated by 90°, said fourth and fifth divide-by-2 circuit (D, E) being coupled in series,

the In-phase output signal (I p , I n ) of the fifth divide-by-2 circuit (E) corresponds to the control signal (C 0 ),

the In-phase output signal (I p , I n ) of the fourth divide-by-2 circuit (D) corresponds to the control signal (C 1 ),

the quadrature phase output signal (Q p , Q n ) of the fourth divide-by-2 circuit (E) corresponds to the control signal (C 2 ).

9. Prescaler according to claim 8 , wherein

the phase control unit (RTU) further comprises a D-latch (DL) coupled to the input of the fifth divide-by-2 circuit (E),

the D-latch (DL) receives the previous state of the In-phase output (I p , I n ) of the seventh divide-by-2 circuit (G) and a signal (modul) indicating the number of phase switching as input signals.

10. Prescaler according to claim 8 , wherein said dual modulus divider ( 10 ) is a 16/17 divider.

11. Prescaler according to claim 8 , further comprising a synchronization loop coupled to the dual modulus divider ( 10 ) for reclocking the dual modulus divider ( 10 ).

12. Frequency synthesizer comprising a prescaler according to claim 8 .