Common program for switching between operation systems is executed in context of the high priority operating system when invoked by the high priority OS
A method of enabling multiple different operating systems to run concurrently on the same computer, which is an Intel or similar Complex Instruction Set Computer architecture, comprising selecting a first operating system to have a relatively high priority (the realtime operating system, such as C5); selecting at least one secondary operating system to have a relatively lower priority (the general purpose operating system, such as Linux); providing a common program (a hardware resource dispatcher similar to a nanokernel) arranged to switch between said operating systems under predetermined conditions; and providing modifications to said first and second operating systems to allow them to be controlled by said common program.
1. A method of enabling multiple different operating systems to run concurrently on the same computer, comprising:
selecting a first operating system to have a relatively high priority, said first operating system possibly being a real time operating system;
selecting at least one second operating system to have a relatively lower priority;
providing a common program arranged to switch between said operating systems under predetermined conditions, the common program being arranged to save, and to restore from a saved version, the processor state required to switch between the operating systems;
providing modifications to said first and second operating systems to allow them to be controlled by said common program,
wherein the first and second operating systems are associated with first and second memory contexts, respectively, and the common program is associated with a third memory context,
switching a current memory context to the first memory context when switching to or from the first operating system; and
switching the current memory context to the third memory context when switching from the second operating system;
wherein, when the common program is invoked by the first operating system, execution of the common program is started in the first memory context, and
wherein, when the common program is invoked by the second operating system, using the third memory context as an intermediate address space.
2. The method of claim 1 , comprising switching the current memory context to the first, second or third memory context when switching between said operating systems.
3. The method of claim 1 , further comprising preempting the first operating system by the common program, and starting execution of the common program in the first memory context.
4. The method of claim 1 , further comprising preempting the second operating system by the common program, wherein the current memory context is the third memory context.
5. The method of claim 4 , wherein the second operating system invokes the common program by a trap call.
6. The method of claim 1 , in which the first operating system is a real time operating system.
7. The method of claim 1 , in which the second operating system is a non-real time, general-purpose operating system.
8. The method of claim 1 , in which the second operating system is Linux, or a version or variant thereof.
9. The method of claim 1 , in which processor exceptions for the second operating system are handled in virtual fashion by the common program.
10. The method of claim 1 , in which the common program is arranged to intercept some processor exceptions, and to call exception handling routines of the first operating system to service them.
11. The method of claim 1 , in which the processor exceptions for the second operating system are notified as virtual exceptions.
12. The method of claim 11 , in which the common program is arranged to call an exception handling routine of the second operating system corresponding to a said virtual exception which is pending.
13. The method of claim 1 , further comprising providing each of said operating systems with separate memory spaces in which each can exclusively operate.
14. The method of claim 1 , further comprising providing each of said operating systems with first input and/or output devices of said computer to which each has exclusive access.
15. The method of claim 1 , in which each operating system accesses said first input and/or output devices using substantially modified native routines.
16. The method of claim 1 , further comprising providing each of said operating systems with access to second input and/or output devices of said computer to which each has shared access.
17. The method of claim 16 , in which all operating systems access said second input and/or output devices using the routines of the first operating system.
18. The method of claim 16 , in which said second device comprises a co-processor, and in which, on switching between said first operating system and said second (or vice versa), the state of said co-processor is not changed, whereby if said operating systems switch back without intervening access to said coprocessor, its operation can complete uninterrupted.
19. The method of claim 1 , further comprising providing a restart routine for restarting a said second operating systems without interrupting operation of said first, or said common program.
20. The method of claim 1 , in which one or more original address tables are provided by the computer for use by an operating system, and in which the common program accesses said original address tables, and provides a plurality of replicated tables having the same structure as said original tables, elsewhere in memory, one per table per operating system, each for use by a respective operating system, and in which said operating systems are modified so as to replace instructions which write said original address tables with routine calls which access said replicated tables.
21. The method of claim 1 , further comprising combining said operating systems and common program into a single code product.
22. The method of claim 1 , further comprising embedding said operating systems and common program onto persistent memory on a computer product.
23. The method of claim 1 , in which each said operating system is provided with an idle routine, in which it passes control to the common program.
24. The method of claim 23 , in which said idle routine substitutes for a processor halt instruction.
25. A development kit computer program product stored in a memory and comprising code that, when executed by a processor, performs the steps of claim 1 .
26. An embedded computer system comprising a CPU, memory devices and input/output devices, having stored on persistent memory therein programs embedded according to claim 25 .
27. The method of claim 1 in which the computer has a Complex Instruction Set architecture.
28. A computer system comprising a CPU, memory devices and input/output devices, having executing thereon computer code comprising:
a first operating system having a relatively high priority, said first operating system possibly being a real time operating system;
a second operating system having a relatively lower priority; and
a common program arranged to run said operating systems concurrently by switching between said operating systems under predetermined conditions, the common program being arranged to save, and to restore from a saved version, the processor state required to switch between the operating systems;
wherein the first and second operating systems are associated with first and second memory contexts, respectively, and the common program is associated with a third memory context,
wherein when switching to or from the first operating system, a current memory context is switched to the first memory context;
wherein when switching from the second operating system, the current memory context is switched to the third memory context;
wherein, when the common program is invoked by the first operating system, execution of the common program is started in the first memory context, and
wherein, when the common program is invoked by the second operating system, using the third memory context as an intermediate address space.
29. A computer system according to claim 28 , arranged to run said first and second operating systems concurrently using the method as described above.
30. A computer system comprising a processor and a memory to execute thereon computer code to operate first and second operating systems in first and second memory contexts, respectively, said first operating system possibly being a real time operating system and a common program configured to execute in said first or a third memory context to switch between the first and second operating systems, the common program being arranged to save, and to restore from a saved version, the processor state required to switch between the operating systems; wherein, when the common program is invoked by the first operating system, execution of the common program is started in the first memory context,
wherein when switching to or from the first operating system, a current memory context is switched to the first memory context;
wherein when switching from the second operating system, the current memory context is switched to the third memory context; and
wherein, when the common program is invoked by the second operating system, using the third memory context as an intermediate address space.