IP Library Granted Patent US 7,471,129
Granted Patent B2
US 7,471,129 · App. 10/574,117 · Granted Dec 30, 2008

Device for utilization with the synchronization of clock signals, and clock signal synchronizing method

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Quick Facts
Patent No.
US 7,471,129
App. No.
10/574,117
Granted
Dec 30, 2008
Kind
B2
Abstract

A clock signal synchronization method and an apparatus device for utilization with the synchronization of clock signals is disclosed. In one embodiment the apparatus includes a delay device with a variably controllable delay time into which a clock signal, or a signal obtained therefrom, is input, charged with the variably controllable delay time, and output as a delayed clock signal. A device is provided for determining whether a clock edge of the delayed clock signal output by the delay device, or of a signal obtained therefrom, lies within a predetermined time window before a corresponding clock edge of the clock signal, or of the signal obtained therefrom.

Claims (41)

1. An apparatus for utilization with the synchronization of clock signals, comprising:

a delay device with a variably controllable delay time into which a clock signal, or a signal obtained therefrom, is input, charged with the variably controllable delay time, and output as a delayed clock signal;

a device configured to determine whether a clock edge of the delayed clock signal output by the delay device, or of a signal obtained therefrom, lies within a predetermined time window before a corresponding clock edge of the clock signal, or of the signal obtained therefrom; and

a frequency detection device, wherein a duration of the time window is determined as a function of the frequency of the clock signal detected by the frequency detection device.

2. The apparatus according to claim 1 , comprising wherein:

if it is determined that the clock edge of the delayed clock signal output by said delay device, or of the signal obtained therefrom, lies within the predetermined time window before the corresponding clock edge of the clock signal, or of the signal obtained therefrom, said device sends a determination signal to said delay device.

3. The apparatus according to claim 2 , comprising wherein the delay device changes from a first to a second mode in reaction to the determination signal.

4. The apparatus according to claim 3 , comprising wherein:

if the device determines that the clock edge of the delayed clock signal output by said delay device, or of the signal obtained therefrom, lies within the predetermined time window before the corresponding clock edge of the clock signal, or of the signal obtained therefrom, the signal delay time caused by said delay device is decremented or incremented in smaller time steps than prior to the determination.

5. The apparatus according to claim 1 , comprising wherein:

if the device determines that the clock edge of the delayed clock signal output by said delay device, or of the signal obtained therefrom, lies within the predetermined time window before the corresponding clock edge of the clock signal, or of the signal obtained therefrom, the signal delay time caused by said delay device is decremented or incremented in smaller time steps than prior to the determination.

6. The apparatus according to claim 1 , comprising wherein the duration of the time window is chosen as a function of the frequency of the clock signal.

7. An apparatus for utilization with the synchronization of clock signals, comprising:

a delay device with a variably controllable delay time into which a clock signal, or a signal obtained therefrom, is input, charged with the variably controllable delay time, and output as a delayed clock signal;

a device configured to determine whether a clock edge of the delayed clock signal output by the delay device, or of a signal obtained therefrom, lies within a predetermined time window before a corresponding clock edge of the clock signal, or of the signal obtained therefrom, wherein if it is determined that the clock edge of the delayed clock signal output by said delay device, or of the signal obtained therefrom, lies within the predetermined time window before the corresponding clock edge of the clock signal, or of the signal obtained therefrom, said device sends a determination signal to said delay device, and wherein the delay device changes from a first to a second mode in reaction to the determination signal; and

a second device for keeping the delay device in the second mode after it has been determined that the clock edge of the delayed clock signal output by said delay device, or of the signal obtained therefrom, lies within the predetermined time window before the corresponding clock edge of the clock signal, or of the signal obtained therefrom; and

a detection device continued to determine a duration of the time window as a function of the frequency of the clock signal detected by the detection device.

8. The apparatus according to claim 7 , comprising wherein the delay device changes from a first to a second mode in reaction to the determination signal.

9. The apparatus according to claim 8 , comprising wherein:

if the device determines that the clock edge of the delayed clock signal output by said delay device, or of the signal obtained therefrom, lies within the predetermined time window before the corresponding clock edge of the clock signal, or of the signal obtained therefrom, the signal delay time caused by said delay device is decremented or incremented in smaller time steps than prior to the determination.

10. The apparatus of claim 7 , comprising wherein the detection device is switched automatically.

11. An apparatus for utilization with the synchronization of clock signals, comprising:

a delay device with a variably controllable delay time that can be decremented or incremented in variably controllable time steps, into which a clock signal, or a signal obtained therefrom, is input, charged with the variably controllable delay time that can be decremented or incremented in variably controllable time steps, and output as delayed clock signal;

a device configured to determine whether a clock edge of the delayed clock signal output by said delay device, or of a signal obtained therefrom, lies within a predetermined time window before a corresponding clock edge of the clock signal, or of the signal obtained therefrom; and

wherein the apparatus is designed and equipped such that, if the device determines that the clock edge of the delayed clock signal output by the delay device, or of the signal obtained therefrom, lies within the predetermined time window before the corresponding clock edge of the clock signal, or of the signal obtained therefrom, the signal delay time caused by the delay device is decremented or incremented in smaller time steps, and thus more slowly, than prior to the determination; and

wherein a duration of the time window is chosen as a function of the frequency of the clock signal, and

a frequency determination device configured to determine the duration of the time window.

12. The apparatus according to claim 11 , comprising wherein:

if it is determined that the clock edge of the delayed clock signal output by said delay device, or of the signal obtained therefrom, lies within the predetermined time window before the corresponding clock edge of the clock signal, or of the signal obtained therefrom, said device sends a determination signal to said delay device.

13. The apparatus according to claim 12 , comprising wherein the delay device changes from a first to a second mode in reaction to the determination signal.

14. The apparatus according to claim 13 , comprising wherein:

if the device determines that the clock edge of the delayed clock signal output by said delay device, or of the signal obtained therefrom, lies within the predetermined time window before the corresponding clock edge of the clock signal, or of the signal obtained therefrom, the signal delay time caused by said delay device is decremented or incremented in smaller time steps than prior to the determination.

15. A clock signal synchronizing method comprising:

charging a clock signal or a signal obtained therefrom with a variably controllable delay time, so that a delayed clock signal is obtained; and

determining whether a clock edge of the delayed clock signal, or of a signal obtained therefrom, lies within a predetermined time window before a corresponding clock edge of the clock signal, or of the signal obtained therefrom;

detecting a frequency of the clock signal; and

determining the duration of the time window as a function of the frequency of the detected clock signal.

16. An apparatus for utilization with the synchronization of clock signals, comprising:

delay means for providing a variably controllable delay time into which a clock signal, or a signal obtained therefrom, is input, charged with the variably controllable delay time, and output as a delayed clock signal; and

means for determining whether a clock edge of the delayed clock signal output by the delay device, or of a signal obtained therefrom, lies within a predetermined time window before a corresponding clock edge of the clock signal, or of the signal obtained therefrom; and

means for detecting a frequency of the clock signal, including determining a duration of the time window as a function of the frequency of the clock signal detected by the second device.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 8, 2010
From: INFINEON TECHNOLOGIES AG
To: QIMONDA AG
Reel/Frame 025452/0534 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 10, 2007
From: RAJASHEKHAR, RAO; MINZONI, ALESSANDRO; SAGLAM, MUSA
To: INFINEON TECHNOLOGIES AG
Reel/Frame 019678/0114 →