A phase-change memory device including a memory cell having a memory element and a select transistor is improved in heat resistance so that it may be operable at 145° C. or higher. The memory layer is used which has a content of Zn or Cd of 20 at % or more and 50 at % or less, a content of Ge or Sb of 5 at % or more and 25 at % or less, and a content of Te of 40 at % or more and 65 at % or less in Zn-Ge-Te.
1. A memory device including a memory element comprising:
a memory layer containing 2 at % or more and less than 25 at % of at least one element selected from the group consisting of Ge, Sb, and Bi, 40 at % or more and 65 at % or less of Te, and 20 at % or more and 50 at % or less of Zn or Cd, and storing information by causing reversible phase-change between a crystal phase and an amorphous phase;
an electrode formed on both surfaces of the memory layer; and
a region adjacent to the memory layer, in which the content of Zn or Cd is higher by 10 at % or more than that of the memory layer.
2. A memory device according to claim 1 , wherein the memory device transmits 30% or more of recording light or reading light.
3. A memory device comprising:
a plurality of memory cells;
a plurality of word lines for selecting the plurality of memory cells; and
a plurality of data lines arranged orthogonally to the plurality of word lines and reading signals from the plurality of memory cells,
wherein each of the plurality of memory cells includes
a memory layer containing Ge or Sb, 40 at % or more of Te, 20 at % or more and 50 at % or less of Zn or Cd, and recording information by causing reversible phase-change between a crystal phase and an amorphous phase;
electrodes formed so as to sandwich the memory layer therebetween for applying a voltage to the memory layer; and
a region adjacent to the memory layer, in which the content of Zn or Cd is higher by 10 at % or more than that of the memory layer.
4. A memory device according to claim 3 , wherein an insulating film is disposed between the memory layer and one surface of the electrode.
5. A memory device comprising:
a plurality of memory cells;
a plurality of word lines for selecting the plurality of memory cells; and
a plurality of data lines arranged orthogonally to the plurality of word lines and reading signals from the plurality of memory cells,
wherein each of the plurality of memory cells includes
a memory layer containing Ge, Sb, 40 at % or more of Te, and 20 at % or more and 50 at % or less of at least one element selected from Zn, Au, Ag, Cu, Ti, Zr, Hf, V, Nb, Ta, Cr, Mn, Fe, Co, Ni, Rh, Pd, La, Ce, Pr, Nd, Sm, Eu, Gd, Tb, Dy, and Cd, and recording information by causing reversible phase-change between a crystal phase and an amorphous phase; and
electrodes formed so as to sandwich therebetween the memory layer for applying the voltage to the memory layer,
wherein an insulating layer is disposed between the memory layer and one surface of one said electrode.
6. A memory device according to claim 5 ,
wherein the insulating layer is disposed in contact with a negative one of said electrodes.