IP Library Granted Patent US 7,876,898
Granted Patent B2
US 7,876,898 · App. 10/596,336 · Granted Jan 25, 2011

Block ciphering system, using permutations to hide the core ciphering function of each encryption round

Assignee: Irdeto BV
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,876,898
App. No.
10/596,336
Granted
Jan 25, 2011
Kind
B2
Abstract

In a system, a server provides a digital signal processing function ƒ to an executing device in an obfuscated form. The function ƒ includes a function cascade of signal processing functions ƒ i , 1≦i≦N (e.g., FC 1 (x)≡ƒ N ∘ . . . ∘ƒ 1 (x)). The server includes a processor for selecting a set of 2N invertible permutations p i , 1≦i≦2N; calculating a set of N functions g i , where g i is functionally equivalent to p 2i −1 ∘ƒ i ∘p 2i−1 , for 1≦i≦N; and calculating a set of N−1 functions h i , where h i is functionally equivalent to p 2i−1 −1 ∘p 2i−2 , for 2≦i≦N. The server equips the executing device with an execution device function cascade that includes y N ∘h N ∘y N−1 ∘h N−1 ∘ . . . ∘y 1 , where y 1 , . . . , y N are function parameters (e.g., ED 1 (y 1 , . . . , y N )≡y N ∘h N ∘y N−1 ∘h N−1 ∘ . . . ∘y 1 ), and provides the functions g 1 , . . . g N to the executing device. The executing device obtains the functions g 1 , . . . , g N and a processor for loading the execution device function cascade and applying the loaded execution device function cascade to the functions g 1 , . . . , g N (e.g., ED 1 (g 1 , . . . , g N )).

Claims (96)

1. A method of providing a digital signal processing function ƒ to an executing device having at least one processor in an obfuscated form; the function ƒ including a function cascade including a plurality of signal processing functions ƒ i , 1≦i≦N, for processing a digital signal input x to yield a digital signal output, the method including:

performing the following steps by at least one processor of the executing device:

selecting a set of 2N invertible permutations p i , 1≦i≦2N;

calculating a set of N functions g i , where g i is functionally equivalent to p 2i −1 ∘ƒ i ∘p 2i−1 , for 1≦i≦N;

calculating a set of N−1 functions h i , where h i is functionally equivalent to p 2i−1 −1 ∘p 2i−2 , for 2≦i≦N;

equipping the executing device with an execution device function cascade that includes y N ∘h N ∘y N−1 ∘h N−1 ∘ . . . ∘y 1 , where y 1 , . . . , y N are function parameters,

providing the functions g 1 , . . . , g N to the executing device; and

in the executing device, applying the execution device function cascade to the functions g 1 , . . . , g N , wherein the execution of the g i and h i functions by the executing device in an interleaved manner enables the functionality of the execution device function cascade to be achieved without function ƒ being directly recognizable.

2. A method of providing a digital signal processing function ƒ as claimed in claim 1 , wherein the execution device function cascade includes y N ∘h N ∘y N−1 ∘h N−1 ∘ . . . ∘y 1 ∘p 1 −1 .

3. A method of providing a digital signal processing function ƒ as claimed in claim 1 , wherein the function cascade starts with a further signal processing function ƒ 0 and the execution device function cascade includes y N ∘h N ∘y N−1 ∘h N−1 ∘ . . . ∘y 1 ∘S 1 , where S 1 is functionally equivalent to p 1 −1 ∘ƒ 0 .

4. A method of providing a digital signal processing function ƒ as claimed in claim 1 , wherein the execution device function cascade includes p 2N ∘y N ∘h N ∘y N−1 ∘h N−1 ∘ . . . ∘y 1 .

5. A method of providing a digital signal processing function ƒ as claimed in claim 1 , wherein the function cascade ends with a further signal processing function ƒ N+1 , and the execution device function cascade includes S 2 ∘y N ∘h N ∘y N−1 ∘h N−1 ∘ . . . ∘y 1 where S 2 is functionally equivalent to ƒ N+1 ∘p 2N .

6. A method of providing a digital signal processing function ƒ as claimed in claim 1 , including obtaining a unique identity of the executing device and/or user of the executing device; the set and/or sequence of 2N invertible permutations p i being unique for the obtained identity.

7. A method as claimed in claim 1 , wherein the step of equipping the executing device with the execution device function cascade includes providing the execution device function cascade embedded in a software program for execution by a processor in the executing device.

8. A method as claimed in claim 7 , wherein the step of providing the functions g 1 , . . . g N to the executing device includes providing the functions g 1 , . . . , g N in the form of a plug-in for the program.

9. A method as claimed in claim 7 , wherein the step of providing the functions g 1 , . . . g N to the executing device includes embedding the functions g 1 , . . . g N in the software program by applying the execution device function cascade to the function parameters g 1 , . . . g N .

10. A computer program product stored on a non-transitory computer readable storage medium that is operative to cause a processor in an execution device to execute a digital signal processing function ƒ including a function cascade including a plurality of signal processing functions f i , where 1≦i≦N, for processing a digital signal input x to yield a digital signal output, by:

performing the following steps by at least one processor of the execution device:

loading an execution device function cascade that includes y N ∘h N ∘y N−1 ∘h N−1 ∘ . . . ∘y 1 , where y 1 , . . . , y N are function parameters,

loading a set of functions g 1 , . . . , g N ;

applying the execution device function cascade to the set of functions g 1 , . . . , g N ;

where:

g i is functionally equivalent to p 2i −1 ∘ƒ i ∘p 2i−1 , for 1≦i≦N;

h i is functionally equivalent to p 2i−1 −1 ∘p 2i−2 , for 2≦i≦N; and

p i is an invertible permutation, for 1≦i≦2N.

11. A system for providing a digital signal processing function ƒ to an executing device in an obfuscated form; the system including a server ( 610 ) and an executing device ( 620 ); the function ƒ including a function cascade including a plurality of signal processing functions ƒ i , 1≦i≦N, for processing a digital signal input x to yield a digital signal output;

the server including a processor ( 612 ) for performing the following steps, under control of a program:

selecting a set of 2N invertible permutations p i , 1≦i≦2N;

calculating a set of N functions g i , where g i is functionally equivalent to p 2i −1 ∘ƒ i ∘p 2i−1 , for 1≦i≦N; and

calculating a set of N−1 functions h i , where h i is functionally equivalent to p 2i−1 −1 ∘p 2i−2 , for 2≦i≦N; and

means ( 614 ) for equipping the executing device with an execution device function cascade that includes y N ∘h N ∘y N−1 ∘h N−1 ∘ . . . ∘y 1 , where y 1 , . . . , y N are function parameters, and

means ( 616 ) for providing the functions g 1 , . . . , g N to the executing device; and

the executing device ( 620 ) including:

means ( 626 ) for obtaining the functions g 1 , . . . , g N from the server; and

a processor ( 622 ) for, under control of a program, loading the execution device function cascade and applying the loaded execution device function cascade to the functions g 1 , . . . , g N , wherein the execution of the g i and h i functions by the executing device in an interleaved manner enables the functionality of the execution device function cascade to be achieved without function ƒ being directly recognizable.

12. An execution device ( 620 ) for use in the system as claimed in claim 11 ; the executing device including:

means ( 626 ) for obtaining the functions g 1 , . . . , g N from the server; and

a processor ( 622 ) for, under control of a program, applying the execution device function cascade to the functions g 1 , . . . , g N and applying the applied device function cascade to the digital signal input x.

13. A method of providing a digital signal processing function ƒ to a plurality of executing devices, each identified by a unique index j, in an obfuscated, anonymous form; the function ƒ including a function cascade including a plurality of signal processing functions ƒ i , where 1≦i≦N, for processing a digital signal input x to yield a digital signal output the method including:

performing the following steps by at least one processor:

selecting a set of 2N invertible permutations p i , where 1≦i≦2N;

calculating a set of N functions g i , where g i is functionally equivalent to p 2i −1 ∘ƒ i ∘p 2i−1 , 1≦i≦N;

selecting for each device j a corresponding set and/or sequence of 2N invertible permutations p j,i , that is unique for the device and/or a user of the device;

calculating for each executing device j a corresponding set of N−1 functions h j,i , where h j,i is functionally equivalent to p j,2i−1 −1 ∘p j,2i−2 for 2≦i≦N;

equipping each executing device j with a respective execution device function cascade ED j (y 1 , . . . , y N ) that includes y N ∘h j,N ∘y N−1 ∘h j,N−1 ∘ . . . ∘y 1 ;

equipping each executing device j with a respective loader function loader j (x 1 , . . . , x N )=(l j,1 ∘x 1 ∘r j,1 , . . . , l j,N ∘x N ∘r j,N ), where l j,i , is functionally equivalent to p j,2i −1 ∘p 2i and r j,i is functionally equivalent to p 2i−1 −1 ∘p j,2i −1 ;

providing to the executing device the functions g 1 , . . . , g N ; and

in the executing device, executing ED j (loader j (g 1 , . . . , g N )).

14. A method of providing a digital signal processing function ƒ as claimed in claim 13 , including providing g 1 , . . . , g N to each executing device through broadcasting and/or distribution on a storage medium with a same content for each executing device.

15. A method of providing a digital signal processing function ƒ as claimed in claim 14 , including also providing the digital signal input x to each executing device through broadcasting and/or distribution on a storage medium with a same content for each executing device.

16. A method of providing a digital signal processing function ƒ as claimed in claim 13 , including providing to executing device j through a one-to-one communication channel and/or a storage medium with a device-specific content at least one the following sets of corresponding functions: h j,i , l j,i or r j,i .

17. A method of providing a digital signal processing function ƒ as claimed in claim 1 , wherein the function ƒ is a decryption function based on a Feistel cipher network and each of the signal processing functions ƒ i is a respective Feistel decryption round function.

18. A method of providing a digital signal processing function ƒ as claimed in claim 17 , wherein each of the permutations p i is a Feistel transformer where a function Q operating on a sequential pair <x, y> is a Feistel transformer if there exist invertible functions Q x and Q y and Q( x, y )= Q x (x),Q y (y) , where Q x (x)⊕Q x (y)=Q x (x⊕y) and Q y (x)⊕Q y (y)=Q y (x⊕y).

19. A computer program product stored on a non-transitory computer readable storage medium that is operative to cause a processor in an execution device j to execute a digital signal processing function ƒ including a function cascade including a plurality of signal processing functions ƒ i , where 1≦i≦N, for processing a digital signal input x to yield a digital signal output, the method including:

performing the following steps by at least one processor of the execution device:

loading an execution device function cascade that is unique for the execution device and that includes y N ∘h j,N ∘y N−1 ∘h j,N−1 ∘ . . . ∘y 1 , where y 1 , . . . , y N are function parameters,

loading a loader function

loader j (x 1 , . . . , x N )≡(l j,1 ∘x 1 ∘r j,l , . . . , l j,N ∘x N ∘r j,N ), loading a set of functions

g 1 , . . . , g N ;

applying the loader function to the set of functions g 1 , . . . , g N yielding a set of functions g j,1 , . . . , g j,N and applying the execution device function cascade to the set of functions g j,1 , . . . , g j,N , where:

g i is functionally equivalent to p 2i −1 ∘ƒ i ∘p 2i−1 , for 1≦i≦N;

p i is an invertible permutation, for 1≦i≦N;

h j,i is functionally equivalent to p j,2i−1 −1 ∘p j,2i−2 for 2≦i≦N;

l j,i is functionally equivalent to p j,2i −1 ∘p 2i ;

r j,i is functionally equivalent to p 2i−1 −1 ∘p j,2i−1 ; and

p j,i are invertible permutations, for 1≦i≦2N, being unique for the device and/or a user of the device.

20. A system for providing a digital signal processing function ƒ to a plurality of executing devices, in an obfuscated, anonymous form; the system including a server and a plurality of executing devices, each identified by a unique index j; the function ƒ including a function cascade including a plurality of signal processing functions ƒ i , where 1≦i≦N, for processing a digital signal input x to yield a digital signal output;

the server including a processor for performing the following steps, under control of a program:

selecting a set of 2N invertible permutations p i , where 1≦i≦2N;

calculating a set of N functions g i , where g i is functionally equivalent to p 2i −1 ∘ƒ i ∘p 2i−1 , for 1≦i≦N;

selecting for each device j a corresponding set and/or sequence of 2N invertible permutations p j,i , that is unique for the device and/or a user of the device;

calculating for each executing device j a corresponding set of N−1 functions h j,i , where h j,i is functionally equivalent to p j,2i−1 −1 ∘p j,2i−2 for 2≦i≦N;

equipping each executing device j with a respective execution device function cascade ED j (y 1 , . . . , y N ) that includes y N ∘h j,N ∘y N−1 ∘j,h N−1 ∘ . . . ∘y 1 ;

equipping each executing device j with a respective loader function loader j (x 1 , . . . , x N )=(l j,1 ∘x 1 ∘r j,1 , . . . , l j,N ∘x N ∘r j,N ), where l j,i is functionally equivalent to p j,2i −1 ∘p 2i and r j,i is functionally equivalent to p 2i−1 −1 ∘p j,2i−1 ; and

providing to the executing device the functions g 1 , . . . , g N ; and

each executing device j,

means for obtaining the functions g 1 , . . . , g N from the server; and

a processor for, under control of a program:

loading an execution device function cascade that is unique for the execution device and that includes y N ∘j,h N ∘y N−1 ∘h j,N−1 ∘ . . . ∘y 1 , where y 1 , . . . , y N are function parameters,

loading a loader function

loader j (x 1 , . . . , x N )≡(l j,1 ∘x 1 ∘r j,1 , . . . , l j,N ∘x N ∘r j,N )

applying the loader function to the set of functions g 1 , . . . , g N yielding a set of functions g j,1 , . . . , g j,N ; and

applying the execution device function cascade to the set of functions g j,1 , . . . , g j,N .

21. An execution device for use in the system as claimed in claim 20 ; where the executing device is identified by a unique index j; and includes:

means for obtaining the functions g 1 , . . . , g N from the server; and

a processor for, under control of a program:

loading an execution device function cascade that is unique for the execution device and that includes y N ∘h j,N ∘y N−1 ∘h j,N−1 ∘ . . . ∘y 1 , where y 1 , . . . , y N are function parameters,

loading a loader function loader j (x 1 , . . . , x N )≡(l j,1 ∘x 1 ∘r j,1 , . . . , l j,N ∘x N ∘r j,N )

applying the loader function to the set of functions g 1 , . . . , g N yielding a set of functions g j,1 , . . . , g j,N ; and

applying the execution device function cascade to the set of functions g j,1 , . . . , g j,N where:

g i is functionally equivalent to p 2i −1 ∘ƒ i ∘p 2i−1 for 1≦i≦N;

p i is an invertible permutation, for 1≦i≦N;

h j,i is functionally equivalent to p j,2i−1 −1 ∘p j,2i−2 for 2≦i≦N;

l j,i is functionally equivalent to p j,2i −1 ∘p 2i ;

r j,i is functionally equivalent to p 2i−1 −1 ∘p j,2i−1 ; and

p j,i are invertible permutations, for 1≦i≦2N, being unique for the device and/or a user of the device.

Assignments (4)
MERGER Recorded Dec 16, 2014
From: IRDETO CORPORATE B.V.
To: IRDETO B.V.
Reel/Frame 034512/0718 →
CHANGE OF NAME Recorded Sep 4, 2013
From: IRDETO B.V.
To: IRDETO CORPORATE B.V.
Reel/Frame 031156/0553 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 25, 2010
From: KONINKLIJKE PHILIPS ELECTRONICS N. V.
To: IRDETO B.V.
Reel/Frame 023985/0760 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 9, 2006
From: GORISSEN, PAULUS MATHIAS HUBERTUS MECHTILDUS ANTONIUS; TRESCHER, JOACHIM ARTUR; STARING, ANTONIUS ADRIAAN MARIA; MALLON, WILLEM CHARLES; TREFFERS, MENNO ANNE
To: KONINKLIJKE PHILIPS ELECTRONICS N V
Reel/Frame 017752/0751 →
Priority Claims (1)
EP 03104643 · Dec 11, 2003 · regional
Continuity (1)
Related Publication 20080285744A1 · Nov 20, 2008