Multi-processing in a BIOS environment
View Patent ↗A basic input/output system (BIOS) for use in a computer system having a plurality of processors is described. The BIOS is embodied in a computer readable medium as computer program instructions which are operable to facilitate substantially simultaneous operation of the plurality of processors. According to one embodiment, the processors are simultaneously enabled to test of different portions of the system memory.
1. A basic input/output system (BIOS) for use in a computer system having a plurality of processors and a system memory, the BIOS being embodied in a computer readable medium as computer program instructions which are operable to facilitate substantially simultaneous testing of different portions of the system memory by selected ones of the plurality of processors, wherein one of the plurality of processors comprises a boot strap processor, and wherein the plurality of processors are configured in a plurality of multi-processor clusters, each of the clusters corresponding to at least one of the different portions of the system memory, wherein the computer program instructions are operable to cause the boot strap processor to assign only one of the processors in each cluster to the corresponding portion of the system memory.
2. A basic input/output system (BIOS) for use in a computer system having a plurality of processors and a system memory, the BIOS being embodied in a computer readable medium as computer program instructions which are operable to facilitate substantially simultaneous testing of different portions of the system memory by selected ones of the plurality of processors, wherein one of the plurality of processors comprises a boot strap processor, the computer program instructions being further operable to cause the boot strap processor to assign each of the different portions of the system memory to one of the selected processors, and to instruct the selected processors to begin testing of the system memory, the computer program instructions further being operable to cause each of the selected processors to initialize and validate its assigned portion of the system memory, to report memory testing progress to the boot strap processor, and to update the memory testing progress after testing a memory segment in its assigned portion of the system memory.
3. A basic input/output system (BIOS) for use in a computer system having a plurality of processors and a system memory, the BIOS being embodied in a computer readable medium as computer program instructions which are operable to facilitate substantially simultaneous testing of different portions of the system memory by selected ones of the plurality of processors, wherein one of the plurality of processors comprises a boot strap processor, the computer program instructions being further operable to cause the boot strap processor to assign each of the different portions of the system memory to one of the selected processors, to monitor progress in testing of the system memory by the selected processors, and to update status information corresponding to the progress after testing of a memory segment by each the selected processors in the assigned portion of the system memory.
4. A basic input/output system (BIOS) for use in a computer system having a plurality of processors and a system memory, the BIOS being embodied in a computer readable medium as computer program instructions which are operable to facilitate substantially simultaneous testing of different portions of the system memory by selected ones of the plurality of processors, wherein one of the plurality of processors comprises a boot strap processor, the computer program instructions being further operable to cause the boot strap processor to assign each of the different portions of the system memory to one of the selected processors, to generate memory testing results upon completion of the testing of the system memory by the selected processors, and to disable any memory modules corresponding to corrupted memory ranges indicated in the memory testing results, wherein the computer program instructions are further operable to cause the computer system to reboot after disabling the memory modules.
5. A basic input/output system (BIOS) for use in a computer system having a plurality of processors and a system memory, the BIOS being embodied in a computer readable medium as computer program instructions which are operable to facilitate substantially simultaneous testing of different portions of the system memory by selected ones of the plurality of processors, wherein one of the plurality of processors comprises a boot strap processor, the computer program instructions being further operable to cause the boot strap processor to assign each of the different portions of the system memory to one of the selected processors, and to disable interrupt generation by the selected processors.
6. A basic input/output system (BIOS) for use in a computer system having a plurality of processors and a system memory, the BIOS being embodied in a computer readable medium as computer program instructions which are operable to facilitate substantially simultaneous testing of different portions of the system memory by selected ones of the plurality of processors, wherein one of the plurality of processors comprises a boot strap processor, the computer program instructions being further operable to cause the boot strap processor to assign each of the different portions of the system memory to one of the selected processors, and wherein the computer program instructions are further operable to associate a lock prefix with instructions targeting a shared memory associated with the boot strap processor thereby ensuring that two of the processors do not access the shared memory at the same time.