IP Library Granted Patent US 7,391,469
Granted Patent B2
US 7,391,469 · App. 10/605,517 · Granted Jun 24, 2008

Method and apparatus for video decoding and de-interlacing

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Quick Facts
Patent No.
US 7,391,469
App. No.
10/605,517
Granted
Jun 24, 2008
Kind
B2
Abstract

An apparatus for video decoding and de-interlacing contains a video decoder for decoding video data to generate decoded video data of a next picture; a storage device coupled to the video decoder, the storage device having four frame buffers for buffering the decoded video data of the next picture into one of the four frame buffers according to data stored in the frame buffers; an interlace/progressive converter coupled to the storage device, for de-interlacing data stored in the frame buffers to generate corresponding progressive video data; and a controller coupled to the video decoder and the interlace/progressive converter, for controlling data access of the video decoder and the interlace/progressive converter to the frame buffers of the storage device.

Claims (30)

1. A method for video decoding in a video decoding/de-interlacing display apparatus, utilizing a storage device having four frame buffers, the method comprising:

(a) decoding interlaced video data of a next picture;

(b) if the decoded next picture is a B picture, buffering the decoded interlaced video data of the next picture into a frame buffer of the storage device not stored with a reference picture nor a present display picture nor a previous display picture; and

(c) if step (b) is not applicable, buffering the decoded interlaced video data of the next picture into a frame buffer of the storage device stored with the previous display picture.

2. The method of claim 1 further comprising:

(d) if the decoded next picture is a reference picture, buffering the decoded interlaced video data of the next picture into a frame buffer of the storage device not stored with the last decoded reference picture nor the present display picture nor the previous display picture.

3. The method of claim 2 wherein the reference picture is an I picture.

4. The method of claim 2 wherein the reference picture is a P picture.

5. A method for video decoding in a video decoding/de-interlacing display apparatus, utilizing a storage device having four frame buffers, the method comprising:

(a) decoding interlaced video data of a next picture; and

(b) if the decoded next picture is a reference picture, buffering the decoded interlaced video data of the next picture into a frame buffer of the storage device not stored with the last decoded reference picture nor a present display picture nor a previous display picture.

6. The method of claim 5 wherein the reference picture is an I picture.

7. The method of claim 5 wherein the reference picture is a P picture.

8. The method of claim 5 further comprising:

(c) if the decoded next picture is a B picture, buffering the decoded interlaced video data of the next picture into a frame buffer of the storage device not stored with a reference picture nor the present display picture nor the previous display picture.

9. The method of claim 8 further comprising:

(d) if step (c) is not applicable, buffering the decoded interlaced video data of the next picture into a frame buffer of the storage device stored with the previous display picture.

10. An apparatus for video decoding and de-interlacing, comprising:

a video decoder for decoding video data to generate decoded interlaced video data of a next picture;

a storage device coupled to the video decoder, the storage device having four frame buffers for buffering the decoded interlaced video data of the next picture into one of the four frame buffers according to data stored in the frame buffers;

an interlace/progressive converter coupled to the storage device, for de-interlacing data stored in the frame buffers to generate corresponding progressive video data according to a previous display picture and a present display picture; and

a controller coupled to the video decoder and the interlace/progressive converter, for controlling data access of the video decoder and the interlace/progressive converter to the frame buffers of the storage device.

11. The apparatus of claim 10 wherein the controller controls the data access of the video decoder according to following principles:

(a) if the decoded next picture is a B picture, buffering the decoded interlaced video data of the next picture into a frame buffer of the storage device not stored with a reference picture nor the present display picture nor the previous display picture; and

(b) if step (a) is not applicable, buffering the decoded interlaced video data of the next picture into a frame buffer of the storage device stored with the previous display picture.

12. The apparatus of claim 10 wherein the controller controls the data access of the video decoder according to following principles:

if the decoded next picture is a reference picture, buffering the decoded interlaced video data of the next picture into a frame buffer of the storage device not stored with the last decoded reference picture nor the present display picture nor the previous display picture.

13. The apparatus of claim 10 wherein the interlace/progressive converter is capable of performing motion adaptive de-interlacing operations.

14. The apparatus of claim 13 wherein the interlace/progressive converter performs the motion adaptive de-interlacing operations incorporating video data of 3-8 fields stored in the frame buffers of the storage device.

15. The apparatus of claim 10 being capable of performing recovery operations to video data from a telecine source.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 1, 2021
From: MEDIATEK INC.
To: XUESHAN TECHNOLOGIES INC.
Reel/Frame 055443/0818 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 5, 2003
From: LIEN, CHI-CHIN
To: MEDIATEK INC.
Reel/Frame 014030/0772 →