Multistaged amplification circuit
View Patent ↗A plurality of transistors Qi (i=1 to n), which are connected to a plurality of differential amplifiers 1, 2 , and 3 and which are connected in a multistaged manner and connected to one constant current source 4 by a current mirror, are arranged collectively on an input side of the constant current source 4 . Due to this, the wiring length between the constant current source 4 and the transistors Qi is shortened to the utmost, and the stability of circuit can be improved. Also, this can restrict the unfavorableness that noise is superposed on the wiring. Additionally, a voltage drop will not occur due to supplied resistance on the ground line, due to each transistor Qi being grounded to the same place via separate ground lines 6, 7 , and 8 . Because of this, the current can be supplied from the constant current source 4 to all transistors Qi without breaking the balance of the current mirror.
1. A multistaged amplification circuit comprising:
a differential amplification circuit, equipped with n differential amplifiers that are connected in a multistaged manner and that amplify and output an input signal from a previous stage to a following stage;
a plurality of transistors connected to said n differential amplifiers that are connected in a multistaged manner, and connected to one constant current source by a current mirror; and
a plurality of separate ground lines,
wherein each of said plurality of transistors is connected to a common ground node by a dedicated one of the plurality of separate ground lines.
2. The multistaged amplification circuit of claim 1 , wherein the plurality of separate ground lines collectively suppress a distributed voltage drop.
3. A multistaged amplification circuit, comprising:
a differential amplification circuit, equipped with n differential amplifiers that amplify and output an input signal from a previous stage to a following stage, and that are connected in a multistaged manner;
a plurality of transistors connected to a plurality of differential amplifiers and one constant current by a current mirror for every group into which said n plurality of differential amplifiers are divided; and
means for suppressing a ground line distributed voltage drop associated with each of the plurality of transistors,
wherein the means for suppressing a distributed voltage drop comprises a plurality of separate ground lines,
wherein each of said plurality of transistors is connected to a common ground node by a dedicated one of the plurality of separate ground lines.
4. The multistaged amplification circuit of claim 3 , wherein the means for suppressing a ground line distributed voltage drop reduces electrical noise.
5. The multistaged amplification circuit of claim 3 , wherein the means for suppressing a ground line distributed voltage drop preserves linearity of an amplified signal.
6. The multistaged amplification circuit of claim 3 , wherein the means for suppressing a ground line distributed voltage drop stabilizes a high frequency operating characteristic of the multistaged amplification circuit.
7. The multistaged amplification circuit of claim 3 , wherein the means for suppressing a ground line distributed voltage drop reduces electrical noise, preserves linearity of an amplified signal, and stabilizes a high frequency operating characteristic of the multistaged amplification circuit.