IP Library Granted Patent US 7,920,630
Granted Patent B2
US 7,920,630 · App. 10/606,478 · Granted Apr 5, 2011

Buffer descriptor data structure for communication link between decode and display processes in MPEG decoders

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,920,630
App. No.
10/606,478
Granted
Apr 5, 2011
Kind
B2
Abstract

A system, method, and apparatus for providing display parameters from the decode process to the display process are presented herein. The decode process receives images which are encoded according to a predetermined standard. Included with the encoded images are parameters which facilitate the decode and display processes. The decode process decodes the encoded images as well as the parameters and stores each image in a separate image buffer. Additionally, the decode process stores the parameters which facilitate the display process in a buffer descriptor structure associated with the image buffer. The display process uses the parameters stored in the buffer descriptor structure during the display process.

Claims (36)

1. A system for displaying images on a single display, said system comprising:

a decoder for decoding encoded images and parameters associated with the images, thereby resulting in decoded images and decoded parameters associated with the decoded images;

a plurality of image buffers for storing the decoded images prior to display on the single display, wherein single ones of the decoded images are displayed at a time on the single display;

a plurality of parameter buffers, wherein each of the plurality of parameters buffers corresponds to a particular one of the plurality of image buffers and is for storing the decoded parameters associated with the image stored in the corresponding one of the plurality of image buffers, prior to display on the single display, wherein single ones of the decoded images are displayed at a time on the single display; and

a display engine for receiving the decoded parameters from the parameter buffers and providing the decoded images for display on the single display using the decoded parameters stored in the parameter buffers, wherein single ones of the decoded images are displayed at a time on the single display.

2. The system of claim 1 , wherein the encoded images and the parameters associated with the images form portions of data packets.

3. The system of claim 2 , wherein the data packets comprise headers, wherein the headers comprise the parameters.

4. The system of claim 3 , wherein the headers comprise picture layer headers.

5. The system of claim 3 , wherein the headers comprise sequence layer headers.

6. The system of claim 2 , wherein the data packets are associated with first headers and second headers, wherein the first headers comprise a portion of the parameters, and wherein the second headers comprise another portion of the parameters.

7. The system of claim 6 , wherein the first headers comprise picture layer parameters and wherein the second headers comprise sequence layer parameters.

8. The system of claim 1 , wherein the encoded images comprise compressed images.

9. The system of claim 1 , wherein the parameters are encoded with a variable length code, and wherein the decoder decodes the variable length code.

10. A circuit for displaying images on a display, said circuit comprising:

a decoder;

a plurality of image buffers connected to the decoder and configured to store images decoded by the decoder;

a plurality of parameter buffers connected to the decoder, wherein each of the plurality of parameters buffers corresponds to a particular one of the plurality of image buffers and is and configured to store parameters associated with the image stored in the corresponding one of the plurality of image buffers;

a display engine connected to the image buffers and the parameter buffers and configured to receive the decoded parameters from the parameter buffers and providing the decoded images for display using the decoded parameters stored in the parameter buffers, said display engine separate from the parameter buffers.

11. The circuit of claim 10 , wherein the encoded images and the parameters associated with the images form portions of data packets.

12. The circuit of claim 11 , wherein the data packets comprise headers, wherein the headers comprise the parameters.

13. The circuit of claim 12 , wherein the headers comprise picture layer headers.

14. The circuit of claim 12 , wherein the headers comprise sequence layer headers.

15. The circuit of claim 11 , wherein the data packets are associated with first headers and second headers, wherein the first headers comprise a portion of the parameters, and wherein the second headers comprise another portion of the parameters.

16. The circuit of claim 15 , wherein the first headers comprise picture layer parameters and wherein the second headers comprise sequence layer parameters.

17. The circuit of claim 10 , wherein the parameters are encoded with a variable length code, and wherein the decoder decodes the variable length code.

18. The system of claim 1 , wherein the decoded parameters include at least one parameters selected from a group consisting of presentation time stamp, top field first, and repeat first field.

19. A system for providing images for display, said system comprising:

a decompression engine for decompressing the images and decoding parameters, thereby resulting in decompressed images;

a first frame buffer for storing a first one of the decompressed images;

a first parameter buffer for storing parameters associated with the first one of the decompressed images;

a second frame buffer for storing a second one of the decompressed images;

a second parameter buffer for storing parameters associated with the second one of the decompressed images;

a third frame buffer for storing a third one of the decompressed images;

a third parameter buffer for storing parameters associated with the third one of the decompressed images; and

a display engine for providing the first decompressed image for display based on the parameters stored in the first parameter buffer, providing the second decompressed image for display based on the parameters stored in the second parameter buffer, and providing the third decompressed image for display based on the parameters stored in the third parameter buffer on a single display, one image at a time.

20. The system of claim 19 , wherein the parameters associated with the first image are decoded during decompression of the first compressed image, wherein the parameters associated with the second image are decoded during decompression of the second compressed image, and wherein the parameters associated with the third image are decoded during decompression of the third compressed image.

Assignments (6)
CORRECTIVE ASSIGNMENT TO CORRECT THE PROPERTY NUMBERS PREVIOUSLY RECORDED AT REEL: 47630 FRAME: 344. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Mar 21, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 048883/0267 →
CORRECTIVE ASSIGNMENT TO CORRECT THE EFFECTIVE DATE OF MERGER TO 9/5/2018 PREVIOUSLY RECORDED AT REEL: 047196 FRAME: 0687. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Oct 29, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047630/0344 →
MERGER Recorded Oct 4, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047196/0687 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: BROADCOM CORPORATION
Reel/Frame 041712/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 1, 2017
From: BROADCOM CORPORATION
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041706/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: BROADCOM CORPORATION
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037806/0001 →