Semiconductor integrated circuit capable of facilitating layout modification

1. A semiconductor integrated circuit comprising:

a variable region to be subjected to a layout modification in conjunction with a change of a circuit component within the variable region; and

a fixed region that is free from the layout modification in conjunction with the change of the circuit component within the variable region, and that includes circuits whose signal transfer characteristics are known in advance, wherein timing verification and evaluation of characteristics are carried out only on the variable region after layout modification.

2. The semiconductor integrated circuit according to claim 1 , further comprising a newly added circuit component placed within the variable region.

3. The semiconductor integrated circuit according to claim 1 , further comprising wiring for electrically connecting the circuit component in the variable region with the circuit component in the fixed region, said wiring being disposed along a straight path connecting the circuit components.

4. The semiconductor integrated circuit according to claim 1 , wherein when the layout modification leaves in the variable region an idle space in which no circuit component is present, the circuit component in the variable region is placed such that it fills the variable region extended by an amount of the idle space.

5. The semiconductor integrated circuit according to claim 1 , further comprising an anti-noise bypass capacitor provided to wiring between the variable region and fixed region.

6. The semiconductor integrated circuit according to claim 1 , further comprising a newly added circuit component separately placed from the variable region and fixed region.