IP Library Granted Patent US 7,545,878
Granted Patent B1
US 7,545,878 · App. 10/608,374 · Granted Jun 9, 2009

Efficient circular clipping implementation using simplified CORDIC rotators

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Quick Facts
Patent No.
US 7,545,878
App. No.
10/608,374
Granted
Jun 9, 2009
Kind
B1
Abstract

A system for the efficient use of CORDIC rotators is provided. The system includes at least one first rotator operating in vector mode and includes a sign storage buffer. The system also includes at least one bit inverter coupled between the first rotator and a second rotator, the second rotator operating in rotation mode.

Claims (39)

1. A system for the efficient use of CORDIC rotators, the system comprising:

at least one first rotator, wherein the at least one first rotator comprises at least one first sign storage buffer;

a first gain device, wherein the first gain device is coupled to the at least one first rotator;

a first limiter, wherein the first limiter is coupled to the first gain device;

at least one bit inverter, wherein the at least one bit inverter is coupled to the at least one first rotator; and

at least one second rotator, wherein the at least one second rotator comprises at least one second sign storage buffer, and wherein the at least one second rotator is coupled to the at least one first rotator;

wherein the at least one first rotator operates in a vector mode and the at least one second rotator operates in a rotation mode.

2. A system as in claim 1 wherein the at least one first rotator comprises a first Coordinate Rotation Digital Computer (CORDIC).

3. A system as in claim 2 wherein the first CORDIC device comprises a first field programmable gate array (FPGA).

4. A system as in claim 2 wherein the first CORDIC device comprises a first application specific integrated circuit (ASIC).

5. A system as in claim 2 wherein the at least one second rotator comprises a second Coordinate Rotation Digital Computer (CORDIC) device.

6. A system as in claim 5 wherein the first CORDIC device comprises a first field programmable gate array (FPGA) and the second CORDIC device comprises a second FPGA.

7. A system as in claim 5 wherein the first CORDIC device comprises a first application specific integrated circuit (ASIC) and the second CORDIC device comprises a second ASIC.

8. A system for the efficient use of CORDIC rotators, the system comprising:

at least one first rotator, wherein the at least one first rotator comprises at least one first sign storage buffer;

at least one bit inverter, wherein the at least one bit inverter is coupled to the at least one first rotator; and

at least one second rotator, wherein the at least one second rotator comprises at least one second sign storage buffer and wherein the at least one second rotator is coupled to the at least one first rotator;

wherein the at least one first rotator operates in a vector mode and the at least one second rotator operates in a rotation mode.

9. A system as in claim 8 wherein the at least one first rotator is a first CORDIC rotator.

10. A system as in claim 8 wherein the at least one second rotator is a second CORDIC rotator.

11. A method for efficiently limiting a vector magnitude, the method comprising the steps of:

providing a first vector, the first vector comprising:

a first magnitude;

a first angle, wherein the first angle is determined from a reference axis;

rotating the first vector such that the first angle is substantially zero, wherein rotating the first vector further comprises the steps of:

rotating the first vector through a plurality of angles where each angle within the plurality of angles is an opposite direction to the preceding angle;

successively storing each angle direction in a first direction matrix vector;

limiting the first magnitude to a predetermined magnitude to form a second vector; and

rotating the second vector through a second angle according to each angle direction in the first direction matrix vector.

12. Apparatus for efficiently limiting a vector magnitude, the apparatus comprising:

means for providing a first vector, the first vector comprising:

a first magnitude;

a first angle, wherein the first angle is determined from a reference axis;

means for rotating the first vector such that the first angle is substantially zero,

wherein the means for rotating the first vector further comprises:

means for rotating the first vector through a plurality of angles where each angle within the plurality of angles is an opposite direction to the preceding angle;

means for successively storing each angle direction in a first direction matrix vector;

means for limiting the first magnitude to a predetermined magnitude to form a second vector; and

means for rotating the second vector through a second angle according to each angle direction in the first direction matrix vector.

Assignments (2)
CHANGE OF NAME Recorded Apr 11, 2023
From: L-3 COMMUNICATIONS CORPORATION
To: L3 TECHNOLOGIES, INC.
Reel/Frame 063295/0788 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 26, 2003
From: HALL, ERIC A.; ERTEL, RICHARD B.; GRIFFIN, DAN M.; GIALLORENZI, THOMAS R.
To: L-3 COMMUNICATIONS CORPORATION
Reel/Frame 014260/0440 →