IP Library Granted Patent US 6,869,873
Granted Patent B2
US 6,869,873 · App. 10/609,889 · Granted Mar 22, 2005

Copper silicide passivation for improved reliability

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Quick Facts
Patent No.
US 6,869,873
App. No.
10/609,889
Granted
Mar 22, 2005
Kind
B2
Abstract

A silane passivation process, carried out in-situ together with the formation of a subsequent dielectric film, converts the exposed Cu surfaces of a Cu interconnect structure, to copper silicide. The copper silicide suppresses Cu diffusion and electromigration and serves as a barrier material in regions where contact to further conductive material is made. An entire copper surface of a copper interconnect structure may be silicided or a local portion of the surface silicided after an opening is formed in an overlying dielectric to expose a portion of the copper surface.

Claims (11)

1. A plasma-based reaction method for forming a semiconductor product comprising:

forming a Cu interconnected structure over a substrate, said Cu interconnect structure including an exposed Cu surface, and

converting at least a portion of said exposed Cu surface to copper silicide under plasma reaction conditions with a gaseous material comprising Si, wherein forming the Cu interconnect structure includes forming a Cu interconnect structure having an upper Cu surface, forming a dielectric layer over said upper Cu surface and forming an opening in said dielectric layer thereby exposing an exposed portion of said upper Cu surface that forms said exposed Cu surface, and wherein said converting includes converting said exposed Cu surface to said copper silicide.

2. The method as in claim 1 , further comprising, after said converting, filling said opening with a conductive material, then polishing to remove portions of said conductive material from over said dielectric.

3. The method as in claim 1 , in which said converting comprises passivating with silane thereby causing Si to penetrate said exposed Cu surface and complex with said Cu therein.

4. The method as in claim 1 , in which said forming a Cu interconnect structure comprises forming said Cu interconnect structure using damascene processing techniques, said Cu interconnect structure formed within a lower dielectric having a top surface that is substantially co-planar with said upper Cu surface.

5. The method as in claim 1 , in which said forming a dielectric layer comprises forming a silicon carbide film, then forming a low-k dielectric film thereover, said dielectric layer therefore comprising a composite structure.

6. The method of claim 1 wherein the step of forming a dielectric layer over said copper interconnect structure comprises forming a silicon carbide film.

7. The method of claim 1 wherein the plasma reaction conditions are created with gaseous material comprising silane.

8. The method of claim 1 wherein the step of forming a dielectric layer includes forming a dielectric layer comprising silicon carbide over the copper interconnect structure.

9. The method of claim 1 wherein the step of forming a dielectric layer includes forming a dielectric layer comprising SiOC—H.

Assignments (1)
RELEASE OF SECURITY INTEREST Recorded Apr 15, 2022
From: CORTLAND CAPITAL MARKET SERVICES LLC
To: HILCO PATENT ACQUISITION 56, LLC; BELL SEMICONDUCTOR, LLC; BELL NORTHERN RESEARCH, LLC
Reel/Frame 059720/0719 →