Mechanism for starvation avoidance while maintaining cache consistency in computer systems

1. A processing system comprising:

a processing unit; and

an interface controller coupled to receive a load request corresponding to a load operation initiated by said processing unit, wherein said interface controller is configured to generate a read-to-share transaction in response to said load request, and wherein, in response to receiving a foreign invalidating transaction subsequent to receiving said read-to-share transaction, said interface controller selectively allows said load operation to complete depending upon an indication of whether the read-to-share transaction corresponds to a critical load.

2. The processing system as recited in claim 1 wherein said interface controller is configured to transition access rights to selected cache blocks in response to receiving data packets of corresponding coherence transactions.

3. The processing system as recited in claim 2 wherein said processing unit provides said indication to said interface controller of whether the read-to-share transaction corresponds to a critical load.

4. The processing system as recited in claim 1 wherein said read-to-share transaction is indicated as corresponding to a critical load if said load operation is an oldest uncommitted load operation.

5. The processing system as recited in claim 4 wherein said read-to-share transaction is indicated as corresponding to said critical load in response to determining that said load operation is the oldest uncommitted load when the load request is provided from said processing unit to said interface controller.

6. The processing system as recited in claim 4 wherein said read-to-share transaction is indicated as corresponding to said critical load in response to determining that said load operation is the oldest uncommitted load at a time when the read-to-share transaction is conveyed on an address network.

7. The processing system as recited in claim 4 wherein said read-to-share transaction is indicated as corresponding to said critical load in response to determining that said load operation is the oldest uncommitted load at a time when the foreign invalidating transaction is received by said interface controller.

8. The processing system as recited in claim 1 wherein said interface controller includes a state controller, wherein said state controller is configured to provide a transient read access right to a cache block corresponding to the read-to-share transaction in response to receiving said foreign invalidating transaction and said indication indicating that the read-to-share transaction corresponds to a critical load.

9. The processing system as recited in claim 8 wherein the state controller is configured to place the cache block in an invalid state in response to receiving said foreign invalidating transaction and said indication indicating that the read-to-share transaction does not correspond to a critical load.

10. The processing system as recited in claim 8 wherein the state controller is configured to allow the load request to be satisfied in response to providing the transient read access right to the cache block and to invalidate the cache block after the load request is satisfied.

11. A computer system comprising:

a system memory;

a first active device configured to access data stored in said system memory, wherein the first active device includes a first cache configured to store data accessed by said first active device; and

a second active device configured to access data stored in said system memory;

wherein said first active device is configured to generate a read-to-share transaction corresponding to a load operation, and wherein, in response to receiving an invalidating transaction subsequent to receiving said read-to-share transaction, said first active device selectively allows said load operation to complete depending upon an indication of whether the load operation is a critical load.

12. The computer system as recited in claim 11 wherein said first active device is configured to transition access rights to selected cache blocks in response to receiving data packets of corresponding coherence transactions.

13. The computer system as recited in claim 11 wherein said load operation is indicated as being a critical load if said load operation is an oldest uncommitted load operation.

14. The computer system as recited in claim 13 wherein said load operation is indicated as being said critical load in response to determining that said load operation is the oldest uncommitted load at a time when the read-to-share transaction is conveyed on an address network by the first active device.

15. The computer system as recited in claim 13 wherein said load operation is indicated as being said critical load in response to determining that said load operation is the oldest uncommitted load at a time when the invalidating transaction is received by said first active device.

16. The computer system as recited in claim 11 wherein said first active device is configured to provide a transient read access right to a cache block corresponding to the read-to-share transaction in response to receiving said invalidating transaction and said indication indicating that the load operation is a critical load.

17. The computer system as recited in claim 16 wherein the first active device is configured to place the cache block in an invalid state in response to receiving said invalidating transaction and said indication indicating that the load operation is not a critical load.

18. The computer system as recited in claim 17 wherein the first active device is configured to allow the load operation to complete in response to providing the transient read access right to the cache block and to invalidate the cache block after the load operation is satisfied.

19. An active device comprising circuitry to generate a read-to-share transaction corresponding to a load operation, wherein, in response to receiving a foreign invalidating transaction subsequent to receiving said read-to-share transaction, said circuitry selectively allows said load operation to complete depending upon an indication of whether the load operation is a critical load.

20. The active device as recited in claim 19 wherein said load operation is indicated as being a critical load in response to determining that said load operation is the oldest uncommitted load at a time when the read-to-share transaction is conveyed on an address network.

21. A method comprising:

generating a read-to-share transaction corresponding to a load operation;

in response to receiving a foreign invalidating transaction subsequent to receiving said read-to-share transaction, selectively allowing said load operation to complete depending upon an indication of whether the load operation is a critical load.

22. The method as recited in claim 21 further comprising:

a processing unit generating a load request corresponding to the load operation;

an interface controller generating the read-to-share transaction in response to said load request;

in response to receiving the foreign invalidating transaction subsequent to receiving said read-to-share transaction, said interface controller selectively allowing said load operation to complete depending upon said indication of whether the read-to-share transaction is a critical load.

23. The method of claims 21 wherein said load operation is indicated as being a critical load if said load operation is an oldest uncommitted load operation.