IP Library Granted Patent US 7,317,209
Granted Patent B2
US 7,317,209 · App. 10/612,414 · Granted Jan 8, 2008

Thin film transistor device and method of manufacturing the same, thin film transistor substrate and display having the same

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Quick Facts
Patent No.
US 7,317,209
App. No.
10/612,414
Granted
Jan 8, 2008
Kind
B2
Abstract

In a method for manufacturing a TFT device, a metal thin film is formed on a gate insulation film. Patterning is performed to remove the metal thin film on a semiconductor layer, and phosphorous ions are implanted using the patterned metal thin film as a mask to form the source and drain regions. The patterned metal thin film is further patterned to form a gate electrode of an n-type TFT. Phosphorous ions are implanted using the gate electrode as a mask to form LDD regions between the source and drain regions and a channel region.

Claims (20)

1. A substrate for a thin film transistor, comprising:

a plurality of bus lines formed on a substrate such that they intersect each other with an insulation film interposed;

pixel regions provided in the form of a matrix in a display area on the substrate;

and a thin film transistor device formed at a peripheral circuit provided around the display area;

wherein the thin film transistor device includes:

a first thin film transistor of a first conductivity type including a semiconductor layer formed on the substrate, a first gate insulation film formed on the semiconductor layer, a second gate insulation film formed on the first gate insulation film, and a first gate electrode formed on the second gate insulation film, a low density impurity region being formed between source and drain regions and a channel region of the semiconductor layer; and

a second thin film transistor including the semiconductor layer, the first gate insulation film, a second gate electrode formed on the first gate insulation film, and an insulation film formed on the second gate electrode and being of the same material as the second gate insulation film.

2. A display comprising:

a substrate having thin film transistors as switching elements,

wherein the substrate includes:

a plurality of bus lines formed on the substrate such that they intersect each other with an insulation film interposed;

pixel regions provided in the form of a matrix in a display area on the substrate;

and a thin film transistor device formed at a peripheral circuit provided around the display area;

wherein the thin film transistor device includes:

a first thin film transistor of a first conductivity type including a semiconductor layer formed on the substrate, a first gate insulation film formed on the semiconductor layer, a second gate insulation film formed on the first gate insulation film, and a first gate electrode formed on the second gate insulation film, a low density impurity region being formed between source and drain regions and a channel region of the semiconductor layer; and

a second thin film transistor including the semiconductor layer, the first gate insulation film, a second gate electrode formed on the first gate insulation film, and an insulation film formed on the second gate electrode and being of the same material as the second gate insulation film.

3. A substrate for a thin film transistor according to claim 1 , further comprising:

a third thin film transistor of a second conductivity type including the semiconductor layer, the first gate insulation film, the second gate insulation film, and the first gate electrode.

4. A display according to claim 2 , wherein the substrate further comprises:

a third thin film transistor of a second conductivity type including the semiconductor layer, the first gate insulation film, the second gate insulation film, and the first gate electrode.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 14, 2005
From: FUJITSU LIMITED
To: SHARP KABUSHIKI KAISHA
Reel/Frame 016345/0210 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 13, 2005
From: FUJITSU DISPLAY TECHNOLOGIES CORPORATION
To: FUJITSU LIMITED
Reel/Frame 016345/0310 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 10, 2003
From: KUROSAWA, YOSHIO; HOTTA, KAZUSHIGE
To: FUJITSU DISPLAY TECHNOLOGIES CORPORATION
Reel/Frame 014583/0471 →