IP Library Granted Patent US 6,888,417
Granted Patent B2
US 6,888,417 · App. 10/613,442 · Granted May 3, 2005

Voltage controlled oscillator

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 6,888,417
App. No.
10/613,442
Granted
May 3, 2005
Kind
B2
Abstract

A folded starved inverter differential output apparatus for use in a voltage controlled oscillator includes a first polarity of two transistors that are cross-coupled and a second polarity of four transistors. Also included are two inverter gates and a supply regulator.

Claims (31)

1. A folded starved inverter differential output apparatus for use in a voltage controlled oscillator comprising:

a first polarity of two transistors cross-coupled;

a second polarity of four transistors;

two inverter gates; and

a supply regulator.

2. A folded starved inverter differential output apparatus of claim 1 wherein the second polarity of four transistors are connected to perform input and control functions.

3. A folded starved inverter differential output apparatus of claim 2 wherein first polarity can be positive or negative.

4. A folded starved inverter differential output apparatus of claim 2 wherein the inverter gates provide linearity to a gain of the voltage controlled oscillator.

5. A folded starved inverter differential output apparatus of claim 2 wherein the supply regulator reduces power supply fluctuations.

6. A folded starved inverter differential output apparatus of claim 5 wherein the first polarity of cross-coupled transistors is connected to provide a differential generating output voltage.

7. A folded starved inverter differential output apparatus comprising

two transistors cross-coupled to provide an output stage;

four transistors connected to provide a folded starved inverter circuit;

two inverter gates; and

a supply regulator; wherein the folded starved inverter differential output apparatus provides a fast slew rate, large voltage swing and symmetric output waveform.

8. A folded starved inverter differential output apparatus of claim 7 wherein the cross-coupled transistors provide a differential output.

9. A folded starved inverter differential output apparatus of claim 7 wherein the inverter gates provide linearity to a gain of a voltage controlled oscillator.

10. A folded starved inverter differential output apparatus of claim 7 wherein the supply regulator reduces power supply fluctuations.

11. A folded starved inverter differential output apparatus of claim 7 wherein two of the four transistors provide an input connection.

12. A folded starved inverter differential output apparatus of claim 7 wherein two of the four transistors provide a current controlling function.

13. A receiver apparatus comprising:

a phase locked loop circuit including a voltage controlled oscillator used to generate a data sampling clock signal;

a data sampler to receive the data sampling clock signal; and

a folded starved inverter circuit contained within the voltage controlled oscillator.

14. A receiver apparatus of claim 13 wherein the folded starved inverter circuit provides a delay to an input signal.

15. A receiver apparatus of claim 14 wherein the folded starved inverter circuit contains two transistors cross-coupled to provide a differential output stage.

16. A receiver apparatus of claim 15 wherein the folded starved inverter circuit contains four transistors connected to provide a folded starved inverter circuit.

17. A receiver apparatus of claim 16 wherein two of the four transistors provide an input connection.

18. A receiver apparatus of claim 17 wherein two of the four transistors provide a current controlling function.

19. A receiver apparatus of claim 18 wherein the receiver further comprises a frequency comparator.

20. A receiver apparatus of claim 19 wherein the receiver samples received data at 3 times the frequency of the data signal.

Assignments (7)
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNOR NAME PREVIOUSLY RECORDED ON REEL 052853 FRAME 0153. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST GRANTED PURSUANT TO THE PATENT SECURITY AGREEMENT PREVIOUSLY RECORDED. Recorded Nov 12, 2021
From: SUPER INTERCONNECT TECHNOLOGIES LLC
To: STARBOARD VALUE INTERMEDIATE FUND LP, AS COLLATERAL AGENT
Reel/Frame 058964/0209 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE NAME PREVIOUSLY RECORDED ON REEL 053654 FRAME 0254. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST GRANTED PURSUANT TO THE PATENT SECURITY AGREEMENT PREVIOUSLY RECORDED. Recorded Nov 12, 2021
From: STARBOARD VALUE INTERMEDIATE FUND LP, AS COLLATERAL AGENT
To: SUPER INTERCONNECT TECHNOLOGIES LLC
Reel/Frame 058872/0486 →
RELEASE OF SECURITY INTEREST IN PATENTS Recorded Jul 8, 2020
From: STARBOARD VALUE INTERMEDIATE FUND LP
To: ACACIA RESEARCH GROUP LLC; AMERICAN VEHICULAR SCIENCES LLC; BONUTTI SKELETAL INNOVATIONS LLC; CELLULAR COMMUNICATIONS EQUIPMENT LLC; INNOVATIVE DISPLAY TECHNOLOGIES LLC; LIFEPORT SCIENCES LLC; LIMESTONE MEMORY SYSTEMS LLC; MOBILE ENHANCEMENT SOLUTIONS LLC; MONARCH NETWORKING SOLUTIONS LLC; NEXUS DISPLAY TECHNOLOGIES LLC; PARTHENON UNIFIED MEMORY ARCHITECTURE LLC; R2 SOLUTIONS LLC; SAINT LAWRENCE COMMUNICATIONS LLC; STINGRAY IP SOLUTIONS LLC; SUPER INTERCONNECT TECHNOLOGIES LLC; TELECONFERENCE SYSTEMS LLC; UNIFICATION TECHNOLOGIES LLC
Reel/Frame 053654/0254 →
PATENT SECURITY AGREEMENT Recorded Jun 5, 2020
From: ACACIA RESEARCH GROUP LLC; AMERICAN VEHICULAR SCIENCES LLC; BONUTTI SKELETAL INNOVATIONS LLC; CELLULAR COMMUNICATIONS EQUIPMENT LLC; INNOVATIVE DISPLAY TECHNOLOGIES LLC; LIFEPORT SCIENCES LLC; LIMESTONE MEMORY SYSTEMS LLC; MERTON ACQUISITION HOLDCO LLC; MOBILE ENHANCEMENT SOLUTIONS LLC; MONARCH NETWORKING SOLUTIONS LLC; NEXUS DISPLAY TECHNOLOGIES LLC; PARTHENON UNIFIED MEMORY ARCHITECTURE LLC; R2 SOLUTIONS LLC; SAINT LAWRENCE COMMUNICATIONS LLC; STINGRAY IP SOLUTIONS LLC; SUPER INTERCONNECT TECHNOLOGIES LLC; TELECONFERENCE SYSTEMS LLC; UNIFICATION TECHNOLOGIES LLC
To: STARBOARD VALUE INTERMEDIATE FUND LP, AS COLLATERAL AGENT
Reel/Frame 052853/0153 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 23, 2013
From: ACACIA RESEARCH GROUP LLC
To: SUPER INTERCONNECT TECHNOLOGIES LLC
Reel/Frame 031290/0038 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 19, 2013
From: SILICON IMAGE, INC.
To: ACACIA RESEARCH GROUP LLC
Reel/Frame 031245/0723 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 21, 2004
From: MOON, YONGSAM; JEONG, DEOG-KYOON; AHN, GIJUNG
To: SILICON IMAGE, INC.
Reel/Frame 014887/0984 →