Digital spread spectrum frequency synthesizer
View Patent ↗The present invention provides a digital spread spectrum frequency synthesizer that comprises a noise-shaped quantizer, a divider and an adjustment means. The noise-shaped quantizer is used to quantize a period control word to a time-varying value. The divider is used for generating an output signal by means of dividing a reference signal by the time-varying value, the output signal feeding back to the noise-shaped quantizer so that the noise-shaped quantizer generates the time-varying value in response to the feedback output signal. The adjustment means is used to adjust the period control word by a period offset in response to the output clock. Accordingly, the frequency synthesizer of the present invention can provide a very precise frequency synthesizer featuring a precision spread spectrum clock and jitter stability as well.
1. A digital spread spectrum frequency synthesizer, comprising:
a divider for receiving a reference clock with a substantially fixed period and generating an output clock with a time-varying period;
a noise-shaped quantizer for quantizing a period control word to a time-varying value in response to said output clock fed from said divider so that said divider generates said output clock by means of dividing said reference clock by said time-varying value;
means for adjusting said period control word in response to said output clock, wherein said period control word is within a period range with reference to a period nominal;
wherein said means for adjusting said period control comprises: an offset generator for generating a period offset in response to said output clock and an adder for generating a period offset in response to said output clock; and an adder for generating said adjusted period control word by means of adding said period offset to said period nominal; and
a filter for substantially filtering out jitter from said output clock.
2. The digital spread spectrum frequency synthesizer as claimed in claim 1 , wherein said period control word has a bit resolution greater than that of said time-varying value.
3. The digital spread spectrum frequency synthesizer as claimed in claim 1 , wherein said noise-shaped quantizer is a delta-sigma quantizer.
4. The digital spread spectrum frequency synthesizer as claimed in claim 1 , wherein said filter is an analog phase locked loop (PLL) device as a low pass filter for removing high frequency jitter from said output clock.
5. A digital spread spectrum frequency synthesizer, comprising:
a divider for receiving a reference clock with a substantially fixed period and generating an output clock with a time-varying period;
a noise-shaped quantizer for quantizing a period control word to a time-varying value in response to said output clock fed from said divider so that said divider generates said output clock by means of dividing said reference clock by said time-varying value;
means for adjusting said period control word by a period offset in response to said output clock; and
a filter for substantially filtering out jitter from said output clock, wherein said means for adjusting said period control word comprises:
an offset generator for generating said period offset in response to said output clock; and
an adder for generating said adjusted period control word by means of adding said period offset to a period nominal,
wherein said offset generator is an up/down counter.
6. A digital spread spectrum frequency synthesizer, comprising:
a noise-shaped quantizer for quantizing a period control word to a time-varying value;
a divider for generating an output signal by means of dividing a reference signal by said time-varying value, said output signal feeding back to said noise-shaped quantizer so that said noise-shaped quantizer generates said time-varying value in response to said feedback output signal; and
means for adjusting said period control word in response to said output signal, wherein the period control word is within a period range with reference to a period nominal wherein said means for adjusting said period control comprises: an offset generator for generating a period offset in response to said output clock and an adder for generating a period offset in response to said output clock; and an adder for generating said adjusted period control word by means of adding said period offset to said period nominal.
7. The digital spread spectrum frequency synthesizer as claimed in claim 6 , further comprising a filter for significantly filtering out jitter from said output signal.
8. The digital spread spectrum frequency synthesizer as claimed in claim 6 , wherein said filter is an analog phase locked loop (PLL) device as a low pass filter for removing high frequency jitter from said output signal.
9. The digital spread spectrum frequency synthesizer as claimed in claim 6 , wherein said reference signal is a reference clock with a substantially fixed period.
10. The digital spread spectrum frequency synthesizer as claimed in claim 6 , wherein said output signal is an output clock with a time-varying period and a substantially precise long-term average frequency.
11. The digital spread spectrum frequency synthesizer as claimed in claim 6 , wherein said period control word has a bit resolution greater than that of said time-varying value.
12. The digital spread spectrum frequency synthesizer as claimed in claim 6 , wherein said noise-shaped quantizer is a delta-sigma quantizer.
13. A digital spread spectrum frequency synthesizer, comprising:
a noise-shaped quantizer for quantizing a period control word to a time-varying value;
a divider for generating an output signal by means of dividing a reference signal by said time-varying value, said output signal feeding back to said noise-shaped quantizer so that said noise-shaped quantizer generates said time-varying value in response to said feedback output signal; and
means for adjusting said period control word by a period offset in response to said output signal,
wherein said means for adjusting said period control word comprises:
an offset generator for generating said period offset in response to said output clock; and
an adder for generating said adjusted period control word by means of adding said period offset to a period nominal,
wherein said offset generator is an up/down counter.