Doppler compensated receiver
View Patent ↗A receiver includes a controller which receives A/D sampled input signals and shifts the sampled digital signal to compensate for Doppler effect in the input signal prior to demodulation. The controller compensates for a Doppler increased frequency by shifting the sampled digital signal so as to skip a sample period every n samples. This may be achieved by decreasing a cycle of m samples by one sample period every n samples. The controller compensates for a Doppler decreased frequency by shifting the sampled digital signal so as to add a sample period every n samples. This may be achieved by repeating a sample every n samples to shift the sampled digital signal. The compensation is performed in software on a multi-threaded processor.
1. A communication receiver comprising:
an antenna for receiving an input signal from a transmitter which is moving relative to the receiver;
an A/D converter, connected to the antenna, for providing a sampled digital signal from the input signal; and
a controller for receiving and demodulating the sampled digital signal from the A/D converter, and the controller, prior to demodulation of the sampled digital signal,
compensates for a Doppler increased frequency by decreasing a cycle of m samples by one sample period every n samples and compensates for a Doppler decreased frequency by increasing the cycle of m samples by one sample period every n samples, where m and n are integers.
2. The receiver according to claim 1 , wherein the controller compensates for the Doppler increased frequency by skipping a sample period every n samples.
3. The receiver according to claim 1 , wherein the input signal has a cycle of m samples, and n is equal to or greater than m.
4. The receiver according to claim 1 , wherein the controller compensates for the Doppler increased frequency by shifting the sampled digital signal forward one sample period every n samples.
5. The receiver according to claim 1 , wherein the controller compensates for the Doppler decreased frequency by adding a sample period every n samples.
6. The receiver according to claim 1 , wherein the controller compensates for the Doppler decreased frequency by repeating a sample every n samples.
7. The receiver according to claim 1 , wherein the controller correlates and tracks a known transmission frequency of the transmitter to the frequency of the input signal.
8. The receiver according to claim 7 , wherein the controller matches the phase of the sampled digital signal to the known transmission frequency of the transmitter.
9. The receiver according to claim 8 , wherein the controller includes a phase locked loop for matching the phases.
10. The receiver according to claim 9 , wherein the controller includes software for shifting and demodulating the sampled digital signal and the phase locked loop.
11. The receiver according to claim 1 , wherein the controller includes software for shifting and demodulating the sampled digital signal.
12. The receiver according to claim 1 , wherein the controller integrates the demodulated sampled digital signals using a sine-cosine table.
13. The receiver according to claim 12 , wherein the controller correlates the integrated digital signal to stored PN sequences.
14. The receiver according to claim 1 , wherein the controller identifies how many transmitters' transmission are in the input signal and compensates and demodulates the sampled data for each identified transmitter, in parallel.
15. The receiver according to claim 14 , wherein the controller is a multi-threaded processor.
16. The receiver according to claim 1 , wherein the input signal is sampled at least eight times per cycle of the input signal.
17. A method of compensating for a Doppler change of frequency in a communication receiver comprising:
converting a received signal into a sampled digital signal;
determining the Doppler change of frequency from a known transmission frequency;
for a Doppler increased frequency, decreasing a cycle of m samples by one sample period every n samples and for a Doppler decreased frequency, increasing a cycle of m samples by one sample period every n samples, where m and n are integers; and
demodulating the compensated sampled digital signal.
18. The method according to claim 17 , wherein for the Doppler increased frequency, skipping a sample period every n samples.
19. The method according to claim 17 , wherein the input signal has a cycle of m samples, and n is equal to or greater than m.
20. The method according to claim 17 , wherein for the Doppler increased frequency, shifting the sampled digital signal forward one sample period every n samples.
21. The method according to claim 17 , wherein for the Doppler decreased frequency, adding a sample period every n samples.
22. The method according to claim 17 , wherein for the Doppler decreased frequency, repeating a sample every n samples to shift the sampled digital signal.
23. The method according to claim 17 , including identifying how many transmitters' transmission are in the input signal and shifting and demodulating the sampled data for each identified transmitter, in parallel.
24. The method according to claim 23 , wherein the method is performed on a multi-threaded processor.
25. The method according to claim 17 , wherein the input signal is sampled at least eight times per cycle of the input signal.