IP Library Granted Patent US 7,119,447
Granted Patent B2
US 7,119,447 · App. 10/620,020 · Granted Oct 10, 2006

Direct fet device for high frequency application

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Quick Facts
Patent No.
US 7,119,447
App. No.
10/620,020
Granted
Oct 10, 2006
Kind
B2
Abstract

A source mounted semiconductor device package is described which includes a semiconductor die having first and second opposing major surfaces, first and second major electrodes disposed on respective major surfaces and a control electrode disposed on the second major surface, and a thin metal clip electrically connected to the first major electrode of the die. The thin metal clip has a relatively large surface area, and package resistance which is caused by skin effect phenomenon is reduced thereby in high frequency applications.

Claims (18)

1. A method for decreasing resistance in external connections of a semiconductor device package in high frequency applications, the method comprising:

providing a semiconductor die having first and second major surfaces;

providing first and second major electrodes on said respective major surfaces, and a control electrode disposed on said second major surface; and

providing a silver-plated metal clip having a flat web portion and electrically connecting said metal clip to said first major surface, said metal clip being configured to reduce the resistance of said semiconductor package when a current is supplied to said semiconductor package at a high frequency, wherein said current is supplied by a voltage regulator module, or said current is supplied by a power buck converter.

2. The method of claim 1 , wherein said high frequency is above 500KHz.

3. The method of claim 1 , wherein said high frequency is above 1 MHz.

4. The method of claim 1 , wherein said high frequency is above 2 MHz.

5. The method of claim 1 , wherein said high frequency is above 4 MHz.

6. The method of claim 1 , wherein the thickness and surface area of said metal clip are configured to reduce the overall resistance of said package at high frequency applications.

7. The method of claim 6 , wherein said clip reduces eddy currents.

8. The method of claim 1 , wherein the thickness and surface area of said metal clip are configured to reduce the overall inductance of said package at high frequency applications.

9. The method of claim 1 , wherein said resistance is caused by skin effect.

10. The method of claim 9 , wherein said clip reduces skin effect.

11. The method of claim 1 , wherein said clip is at least 4 skin depths.

12. The method of claim 1 , wherein said clip is made of copper.

13. The method of claim 1 , wherein said clip is laminated.

14. The method of claim 1 , wherein said clip has alternating layers of copper alloy and an insulator, said copper alloy laminated to said insulator.

15. The method of claim 1 , wherein said flat web portion of said clip has a surface area that is larger than said first major surface.

Assignments (2)
CHANGE OF NAME Recorded Jul 23, 2018
From: INTERNATIONAL RECTIFIER CORPORATION
To: INFINEON TECHNOLOGIES AMERICAS CORP.
Reel/Frame 046612/0968 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 15, 2003
From: LARKING, JOHN E.
To: INTERNATIONAL RECTIFIER CORPORATION
Reel/Frame 014302/0360 →