Method of producing a semiconductor integrated circuit device and the semiconductor integrated circuit device
View Patent ↗An amount of a semiconductor substrate cut due to etching in the bottom of a contact hole formed by the SAC technique is reduced. Silicon oxide films are dry etched under the conditions of increasing the etching selective ratio of the silicon oxide films to an insulating film. Then, the conditions are changed to those increasing the etching selective ratio of the insulating film to the silicon oxide films and the insulating film is etched by a predetermined amount.
1. A semiconductor integrated circuit device comprising:
a plurality of gate electrodes formed over a semiconductor substrate;
a cap insulating film formed over the plurality of gate electrodes;
a hole part formed between the plurality of gate electrodes, the hole part reaching the semiconductor substrate;
one insulating film configuring at least a part of sidewalls of the cap insulating film, sidewalls of the gate electrodes and sidewalls of the hole part;
another insulating film formed over said one insulating film;
a further insulating film configuring sidewalls of said hole part; and
a conductive film formed inside said hole part,
wherein said one insulating film is overlapped with said further insulating film in a bottom of said hole part.
2. The semiconductor integrated circuit device according to claim 1 , wherein a film thickness of said further insulating film is a film thickness not fully burying a space between the plurality of the gate electrodes.
3. The semiconductor integrated circuit device according to claim 1 , wherein said one insulating film has a film thickness thickening from top to bottom inside said hole part, and said hole part is a forward tapered shape narrowing from top to bottom.
4. The semiconductor integrated circuit device according to claim 1 , wherein said one insulating film and said further insulating film each has a main component of silicon nitride.
5. The semiconductor integrated circuit device according to claim 1 , wherein said one insulating film has a main component of silicon nitride and said further insulating film has a main component of silicon oxide.
6. The semiconductor integrated circuit device according to claim 1 , wherein said further insulating film has a film thickness thinner than that of said one insulating film.
7. The semiconductor integrated circuit device according to claim 1 , wherein said further insulating film has a film thickness thicker than that of said one insulating film.
8. The semiconductor integrated circuit device according to claim 1 , wherein said another insulating film is an organic-based insulating film.
9. The semiconductor integrated circuit device according to claim 8 , wherein said another insulating film is an organic SOG film.
10. The semiconductor integrated circuit device according to claim 1 , wherein said another insulating film is an inorganic-based insulating film.
11. The semiconductor integrated circuit device according to claim 10 , wherein said another insulating film is an inorganic SOG film.
12. The semiconductor integrated circuit device according to claim 1 , wherein said another insulating film is an insulating film having a dielectric constant of about four or less.
13. The semiconductor integrated circuit device according to claim 1 , wherein a plan shape of an opening of said hole part is formed to be circular, oval or rectangular.
14. The semiconductor integrated circuit device according to claim 13 , wherein a ratio of a length of a long side to a short side of the opening of said hole part is about from one to three.
15. The semiconductor integrated circuit device according to claim 13 , wherein a ratio of a depth to the long side of the opening of said hole part is about one or greater.
16. The semiconductor integrated circuit device according to claim 14 , wherein a ratio of a depth to the long side of the opening of said hole part is about one or greater.
17. A semiconductor integrated circuit device comprising:
memory cells of a dynamic random access memory, including gate electrodes formed over a main surface of a semiconductor substrate;
one insulating film covering upper surfaces of said gate electrodes, side surfaces of said gate electrodes and said main surface;
another insulating film formed over said one insulating film to cover said one insulating film;
a hole part formed in said another insulating film and in said one insulating film such that said one insulating film configures side walls of said gate electrodes and side walls of said hole part, said hole part reaching said substrate;
a further insulating film configuring side walls of said hole part such that said further insulating film is overlapped with said one insulating film in entire circumference of a bottom of said hole part,
wherein said one insulating film contains silicon and nitrogen,
wherein said further insulating film contains silicon and nitrogen, and
a conductive film is formed inside said second hole part.
18. A semiconductor integrated circuit device according to claim 17 , wherein said another insulating film contains a spin on glass (SOG) film.
19. A semiconductor integrated circuit device according to claim 17 , wherein said further insulating film has a thickness thinner than that of said one insulating film.
20. A semiconductor integrated circuit device according to claim 17 , wherein said gate electrodes include gate electrodes of transfer MISFETs of memory cells of said dynamic random access memory.
21. A semiconductor integrated circuit device according to claim 17 , wherein said another insulating film has a dielectric constant less than four.
22. A semiconductor integrated circuit device comprising:
gate electrodes formed over a main surface of a semiconductor substrate;
one insulating film covering upper surfaces of said gate electrodes, side surfaces of said gate electrodes and said main surface;
another insulating film formed over said one insulating film to cover said one insulating film;
a hole part formed in said another insulating film and in said one insulating film such that said one insulating film configures side walls of said gate electrodes and side walls of said hole part, said hole part reaching said substrate;
a further insulating film configuring side walls of said hole part such that said further insulating film is overlapped with said one insulating film in entire circumference of a bottom of said hole part,
wherein said one insulating film contains silicon and nitrogen,
wherein said further insulating film contains silicon and nitrogen, and
a conductive film is formed inside said hole part.
23. A semiconductor integrated circuit device according to claim 22 , wherein said another insulating film contains a spin on glass (SOG) film.
24. A semiconductor integrated circuit device according to claim 22 , wherein said further insulating film has a thickness thinner than that of said one insulating film.
25. A semiconductor integrated circuit device comprising:
memory cells of a dynamic random access memory, each including a gate electrode of a transfer MISFET formed over a main surface of a semiconductor substrate;
one insulating film covering upper surfaces of said gate electrodes, side surfaces of said gate electrodes and said main surface;
another insulating film formed over said one insulating film to cover said one insulating film;
a hole part formed in said another insulating film and in said one insulating film such that said one insulating film configures side walls of said gate electrodes and side walls of said hole part, said hole part reaching said substrate;
a further insulating film configuring side walls of said hole part such that said further insulating film is overlapped with said one insulating film in entire circumference of a bottom of said hole part,
wherein said one insulating film contains silicon and nitrogen,
wherein said further insulating film contains silicon and nitrogen;
wherein a conductive film is formed inside said hole part, and
wherein said another insulating film contains a spin on glass (SOG) film.
26. A semiconductor integrated circuit device according to claim 25 , wherein said further insulating film has a thickness thinner than that of said one insulating film.