Granted Patent B2

US 7,254,244 · App. 10/628,827 · Granted Aug 7, 2007

Abstract

Claims (31)

1. An apparatus comprising:

an audio amplifier to generate an output to an audio load;

a digital-to-analog converter to drive the audio amplifier during at least one of powering up and powering down the audio amplifier, the digital-to-analog converter to control the audio amplifier to ramp the voltage at the output at a predetermined rate to reduce audio pop and click from being heard at the load during the at least one of powering up or powering down of the audio amplifier;

a control circuit to generate data sent to the digital-to-analog converter during at least one of powering up and powering down the audio amplifier; and

a clamping switch at the output of the amplifier to selectively clamp the output of the amplifier to a power return potential, wherein the clamping switch is on to clamp the output to the return potential during initiation of a powering up sequence and the clamping switch is off when the audio amplifier and the digital-to-analog converter are substantially turned on.

2. The apparatus of claim 1 wherein the data from the control circuit ramps the voltage at a ramp rate below frequency heard at the load.

3. The apparatus of claim 1 wherein the clamping switch is turned on to clamp the output to the return potential at initiation of a powering down sequence.

4. The apparatus of claim 3 wherein the data from the control circuit ramps the voltage at a ramp rate below frequency heard at the load.

5. A method to power up or power down an audio amplifier comprises:

sending digital data for digital-to-analog conversion during a powering up or powering down of an audio amplifier, which generates an output to an audio load;

converting the digital data to drive the audio amplifier;

clamping of an output node of the audio amplifier to a power return potential during initiation of a powering up sequence and turning off the clamping when the audio amplifier and the digital-to-analog converter are substantially turned on; and

using the converted digital data to control the ramping of the voltage at the output to not exceed a predetermined rate to reduce audio pop and click from being heard at the load during the powering up or powering down of the audio amplifier.

6. The method of claim 5 further comprises ramping the voltage at the output to a steady-state reference value at the predetermined rate during the powering up of the audio amplifier.

7. The method of claim 6 wherein using the converted digital data controls the ramping of to voltage to a ramp rate below frequency heard at the load.

8. The method of claim 5 further comprises ramping the voltage at the output from a steady-state reference value at the predetermined rate during the powering down of the audio amplifier.

9. The method of claim 8 wherein using the converted digital data controls the ramping of the voltage to a ramp rate below frequency heard at the load.

10. An integrated circuit comprising:

an audio amplifier to generate an analog output to am audio load, when the audio load is operably coupled to the integrated circuit;

a digital-to-analog converter to drive the audio amplifier during at least one of powering up and powering down the audio amplifier, the digital-to-analog converter to control the audio amplifier to ramp the voltage at the output at a predetermined rate to reduce audio pop and click from being heard at the load during the at least one of powering up or powering down of the audio amplifier;

a control circuit to generate data sent to the digital-to-analog converter during at least one of powering up and powering down the audio amplifier; and

a clamping switch at the output of the amplifier to selectively clamp the output of the amplifier to a power return potential, wherein the clamping switch is turned on to clamp the analog output to the power return potential during initiation of a powering down sequence and wherein the clamping switch is turned off when the audio amplifier and the digital-to-analog converter are substantially turned on.

11. The integrated circuit of claim 10 wherein the control circuit is a digital signal processor.

12. An apparatus comprising:

an amplifier to generate an output to a load;

a digital-to-analog converter to drive the amplifier during at least one of powering up and of powering down the amplifier, the digital-to-analog converter to control the amplifier to ramp the voltage at the output at a predetermined rate to reduce rapid voltage changes from being sent to the load during the at least one of powering up or powering down of the amplifier; and

a clamping switch at the output of the amplifier to selectively clamp the output of the amplifier to a power return potential wherein the clamping switch is turned on to clamp the output to the power return potential during initiation of a powering down sequence and wherein the clamping switch is turned off when the audio amplifier and the digital-to-analog converter are substantially turned on.

13. The apparatus of claim 12 wherein the output of the amplifier to the load is through a blocking capacitor, the digital-to-analog converter to control the ramp of the voltage at the output to a least one of charging the blocking capacitor to a steady-state reference value at the predetermined rate and of discharging the blocking capacitor from the steady-state reference value at the predetermined rate.

14. The apparatus of claim 13 wherein the amplifier to generate an audio output to the load in which the at least one of powering up and powering down at the predetermined rate reduces audio pop and click at the load.

15. The apparatus of claim 12 further comprises a control circuit to generate data sent to the digital-to-analog converter during at least one of powering up and powering down the amplifier.

16. The apparatus of claim 15 wherein the data from the control circuit ramps the voltage at a substantially linear ramp rate.

Assignments (12)