Synchronized rectifying controller for a forward power converter
The present invention provides a forward power converter with a synchronized rectifying controller. The synchronized rectifying controller has a detection input for detecting the voltage of a secondary winding of a transformer, and thereby accurately measuring the PWM signal. Based on this measurement, the synchronized rectifying controller generates control signals for two secondary-side rectifying MOSFETs. The present invention also introduces a delay time using a timing resistor coupled to the synchronized rectifying controller. This avoids cross-conduction from secondary-side MOSFETs. The present invention also includes an output current-sense mechanism to avoid reverse inductor currents under light-load conditions.
1 . A forward power converter, comprising:
an input voltage source;
a transformer having a primary winding and a secondary winding;
a primary circuit coupled to said primary winding;
a first MOSFET having a drain connected to a negative terminal of said secondary winding, wherein said first MOSFET has a source connected to a first terminal of a first resistor;
a second MOSFET having a drain connected to a positive terminal of said secondary winding, wherein said second MOSFET has a source connected to said source of said first MOSFET and a first terminal of a second resistor; and
a controller for generating a first output-control signal and a second output-control signal to synchronously control said first MOSFET and said second MOSFET.
2 . The forward power converter as claimed in claim 1 further comprising:
an output inductor connected between said positive terminal of said secondary winding and an output terminal of the power converter;
an output capacitor having a positive terminal connected to said output terminal of the power converter and a negative terminal connected to the ground reference;
a detection diode coupled between said positive terminal of said secondary winding and a detection input of said controller; and
a programmable timing resistor.
3 . The forward power converter as claimed in claim 1 , wherein said primary circuit comprises:
a switching device for conducting a current from said input voltage source to said primary winding, wherein said primary winding conducts a current from said input voltage source to said primary winding only when said switching device is on; and
a switching signal generator for operating said switching device.
4 . The forward power converter as claimed in claim 1 , wherein said controller comprises:
a first comparator having a positive input connected to an anode of said detection diode, wherein said first comparator has a negative input connected to a first reference voltage terminal;
a second comparator having a negative input connected to said anode of said detection diode, wherein said second comparator has a positive input connected to a second reference voltage terminal;
a third comparator having a positive input connected to a second terminal of said first resistor, wherein said third comparator has a negative input connected to a second terminal of said second resistor;
a first current source connected between a supply voltage terminal and said positive input of said first comparator;
a second current source connected between the supply voltage terminal and said negative input of said third comparator; and
a third current source connected between the supply voltage terminal and said positive input of said third comparator.
5 . The forward power converter as claimed in claim 1 , wherein said controller further comprises:
a single-pulse generator for generating a single-pulse signal, wherein said single-pulse generator has a first input connected to an output of said first comparator, wherein said single-pulse generator has a second input coupled to said programmable timing resistor;
a first flip-flop for providing said first output-control signal, wherein said first flip-flop has a first input connected to the supply voltage terminal, wherein said first flip-flop has a second input connected to the output of said first comparator;
a second flip-flop having a first input connected to the supply voltage terminal, said second flip-flop having a second input connected to an output of said second comparator;
a first NOT-gate for supplying a reset signal to a RESET-input of said first flip-flop, wherein said first NOT-gate has an input connected to said output of said second comparator;
a first AND-gate having a first input connected to an output of said single-pulse generator, wherein said first AND-gate has a second input connected to an output of said third comparator, wherein said first AND-gate has an output connected to a RESET-input of said second flip-flop; and
a second AND-gate for providing said second output-control signal, wherein said second AND-gate has a first input connected to said output of said single-pulse generator, wherein said second AND-gate has a second input connected to said output of said second comparator, wherein said second AND-gate has a third input connected to an output of said second flip-flop.
6 . The forward power converter as claimed in claim 5 , wherein said single-pulse generator comprises:
an operational amplifier having a positive input connected to a third reference voltage terminal, wherein said operational amplifier has a negative input connected to said programmable timing resistor;
a third MOSFET having a gate connected to an output of said operational amplifier, wherein said third MOSFET has a source connected to said programmable timing resistor;
a current mirror,
a fourth current source connected in parallel with said current mirror; and
a fourth comparator having a negative input coupled to said fourth current source, wherein said fourth comparator has a positive input connected to a fourth reference voltage terminal.
7 . The forward power converter as claimed in claim 5 , wherein said single-pulse generator further comprises:
a delay circuit, wherein said delay circuit includes at least three NOT-gates connected in series to create a delay time, wherein an input of said delay circuit is coupled to said output of said first comparator;
a third AND-gate having a first input connected to an output of said delay circuit, wherein said third AND-gate has a second input connected to said input of said delay circuit;
a fourth MOSFET having a gate connected to an output of said third AND-gate, wherein said fourth MOSFET has a drain coupled to said negative input of said fourth comparator, wherein said fourth MOSFET has a source connected to the ground reference;
a fifth current source connected between said negative input of said fourth comparator and the ground reference; and
a capacitor coupled in parallel with said fifth current source.