Angled pinned photodiode for high quantum efficiency

1. A photodiode for use in an imaging device, said photodiode comprising:

a first layer of a first conductivity type formed in a substrate and laterally displaced from an electrically active portion of gate of a charge transfer transistor by a distance of about 300 Angstroms to about 3,000 Angstroms; and

a charge collection region of a second conductivity type formed below said first layer for accumulating photo-generated charge, said charge collection region being adjacent said transistor gate, said gate transferring charge accumulated in said charge collection region to a doped region of said second conductivity type.

2. The photodiode of claim 1 , wherein said first layer is a surface layer.

3. The photodiode of claim 1 , wherein said first layer is in contact with an isolation region formed within said substrate.

4. The photodiode of claim 1 , wherein said first conductivity type is p-type and said second conductivity type is n-type.

5. The photodiode of claim 4 , wherein said first layer is doped with a p-type dopant at an implant dose of from about 1×10 12 to about 1×10 14 atoms per cm 2 .

6. The photodiode of claim 4 , wherein said charge collection region is doped with an n-type dopant at an implant dose of about 1×10 11 to about 1×10 14 atoms per cm 2 .

7. The photodiode of claim 1 , wherein said photodiode is a p-n-p photodiode.

8. The photodiode of claim 1 , wherein said imaging device is one of a 3T, 4T, 5T or 6T imaging device.

9. The photodiode of claim 1 , wherein said imaging device is a CCD imaging device.

10. An image pixel comprising:

a gate structure of a transistor formed over a semiconductor substrate; and

a photodiode adjacent said gate, said photodiode comprising a pinned layer of a first conductivity type and a doped region of a second conductivity type located below said pinned layer, said pinned layer being laterally displaced from an electrically active portion of said gate by a distance of about 300 Angstroms to about 3000 Angstroms, and said doped region being spaced from said electrically active portion of said gate by a gate sidewall.

11. The image pixel of claim 10 , wherein said pinned layer is adjacent and in contact with an isolation region formed within said semiconductor substrate.

12. The image pixel of claim 10 , wherein said first conductivity type is p-type and said second conductivity type is n-type.

13. The image pixel of claim 10 , wherein said pinned layer is doped with dopants selected from the group consisting of boron, beryllium, indium and magnesium.

14. The image pixel of claim 10 , wherein said pinned layer is doped with boron at an implant dose of from about 1×10 12 to about 1×10 14 atoms per cm 2 .

15. The image pixel of claim 10 , wherein said photodiode is a p-n-p photodiode.

16. The image pixel of claim 10 , wherein said photodiode is part of a CMOS imager.

17. The image pixel of claim 10 , wherein said photodiode is part of a CCD imager.

18. A photodiode of an image sensor comprising:

a surface layer of a first conductivity type adjacent a gate of a transfer transistor, said gate being formed over a silicon substrate; and

a doped region of a second conductivity type located below said surface layer, at least a portion of said doped region being located between said gate and said surface layer, said surface layer being laterally displaced from said gate by a distance of about 300 Angstroms to about 3,000 Angstroms.

19. The photodiode of claim 18 , wherein said surface layer is adjacent and in contact with an isolation region formed within said silicon substrate.

20. The photodiode of claim 18 , wherein said surface layer and said doped region are both located within a doped layer of said first conductivity type.

21. The photodiode of claim 18 , wherein said surface layer is doped with phosphorous at an implant dose of from about 1×10 12 to about 1×10 14 atoms per cm 2 .

22. The photodiode of claim 18 , wherein said image sensor is a CMOS imager.

23. The photodiode of claim 18 , wherein said image sensor is a CCD imager.

24. A CMOS imager system comprising:

(i) a processor; and

(ii) a CMOS imaging device coupled to said processor, said CMOS imaging device comprising:

a field isolation region formed in a substrate; and

a pixel adjacent said field isolation region, said pixel comprising a p-n-p photodiode adjacent a gate of a transfer transistor, said p-n-p photodiode further comprising a p-type surface layer and an n-type doped region located below said p-type surface layer, said p-type surface layer being laterally displaced from an electrically active portion of said gate by a distance of about 300 Angstroms to about 3,000 Angstroms.

25. The system of claim 24 , wherein said p-type surface layer is adjacent and in contact with said field oxide region.

26. The system of claim 24 , wherein said p-type surface layer and said n-type doped region are both located within a p-type doped region.

27. The system of claim 24 , wherein said p-type surface layer is doped with boron at an implant dose of from about 1×10 12 to about 1×10 14 atoms per cm 2 .

28. A photodiode for use in an imaging device, said photodiode comprising:

a first layer of a first conductivity type formed in a substrate and laterally displaced from an electrically active portion of gate of a charge transfer transistor by a distance of about 0 Angstroms to about 5,000 Angstroms;

a doped region of a second conductivity type; and

a charge collection region of said second conductivity type formed below said first layer for accumulating photo-generated charge, said charge collection region being in contact with at least a portion of said transistor gate, said gate transferring charge accumulated in said charge collection region to said doped region of said second conductivity type.

29. The photodiode of claim 28 , wherein said first layer is laterally displaced from said electrically active portion by about 300 Angstroms to about 3,000 Angstroms.

30. The photodiode of claim 28 , wherein said first layer is in contact with an isolation region formed within said substrate.

31. The photodiode of claim 28 , wherein said first layer is doped with a dopant at an implant dose of from about 1×10 12 to about 1×10 14 atoms per cm 2 .

32. The photodiode of claim 28 , wherein said imaging device has a plurality of pixels, each comprising said photodiode and at least three operational transistors.

33. The photodiode of claim 28 , wherein said imaging device is a CCD imaging device.

34. An image pixel comprising:

a gate structure of a transistor formed over a semiconductor substrate;

an insulating layer provided over and in contact with said gate structure; and

a photodiode adjacent said gate, said photodiode comprising a pinned layer of a first conductivity type and a doped region of a second conductivity type located below said pinned layer, said doped region being spaced from an electrically active portion of said gate, and said pinned layer being laterally displaced from said electrically active portion of said gate by at least a thickness of said insulating layer.

35. The image pixel of claim 34 , wherein said pinned layer is displaced from an electrically active portion of said gate structure by a distance of about 300 Angstroms to about 3,000 Angstroms.

36. The image pixel of claim 34 , wherein said first conductivity type is p-type and said second conductivity type is n-type.

37. The image pixel of claim 34 , wherein said pinned layer is doped with dopants selected from the group consisting of boron, beryllium, indium and magnesium.

38. The image pixel of claim 37 , wherein said pinned layer is doped with boron at an implant dose of from about 1×10 12 to about 1×10 14 atoms per cm 2 .

39. The image pixel of claim 34 , wherein said photodiode is a p-n-p photodiode.

40. The image pixel of claim 34 , wherein said photodiode is part of a CMOS imager.

41. The image pixel of claim 34 , wherein said photodiode is part of a CCD imager.