Method for designing interconnects in an LSI
View Patent ↗A method includes the steps of estimating a positive-component average current avg_p and a negative-component average current avg_n of each of terminals of circuit elements; separating the terminals into a positive-node terminal set and a negative-node terminal set by a target branch; calculating Iavg_p and Iavg_n of the target branch as follows: Iavg_p = min ( ∑ m = 1 M a m · avg_n m , ∑ m = 1 M ( 1 - a m ) · avg_p m , ) , and Iavg_n = min ( ∑ m = 1 M a m · avg_p m , ∑ m = 1 M ( 1 - a m ) · avg_n m , ) , wherein m is the sequential number of the terminals, M is the highest sequential number, am=1 or am=0 depending on the m-th terminal belonging to the positive-node terminal set or negative-node terminal set; selecting a larger value of Iavg_p and Iavg_n as the target branch; and determining the size of the interconnect for the target branch.
1. A method for designing interconnects of an LSI, comprising the steps of:
preparing a netlist including a plurality of nets each specifying connection between two of terminals of circuit elements;
performing a simulation for estimating a positive-component average current and a negative-component average current of each of said terminals;
defining a graph including therein a set of nodes and a set of branches each connecting two of said nodes, said set of nodes including at least some of said terminals and branch points of at least some of said branches;
nominating two of said nodes connected by a target branch selected from said at least some of said branches as a positive node and a negative node by using a fixed rule, and separating said at least some of said terminals by said target branch into a positive-node terminal set and a negative-node terminal set corresponding to said positive node and said negative node;
calculating a first sum of said negative-component average currents of said terminals belonging to said positive-node terminal set and a second sum of said positive-component average current of said terminals belonging to said negative-node terminal set, to select a lower value of said first sum and said second sum as a positive-component average current of said target branch;
calculating a third sum of said positive-component average currents of said terminals belonging to said positive-node terminal set and a fourth sum of said negative-component average currents of said terminals belonging to said negative-node terminal set, to select a lower value of said third sum and said fourth sum as a negative-component average current of said target branch; and
designing a size of an interconnect corresponding to said target branch based on said positive-component average current and said negative-component average current of said target branch.
2. The method according to claim 1 , wherein said size designing step includes selecting a larger value of said positive-component average current and said negative-component average current of said target branch as a branch current of said target branch.
3. The method according to claim 1 , wherein said simulation performing step includes obtaining a waveform of a current of said each of said terminals.
4. The method according to claim 1 , wherein said positive-component average current avg_p and said negative-component average current avg_n of said each of said terminals are respectively represented by:
avg_p
=
1
2
T
∫
0
T
{
I
(
t
)
+
I
(
t
)
}
ⅆ
t
,
and
avg_n
=
1
2
T
∫
0
T
{
I
(
t
)
-
I
(
t
)
}
ⅆ
t
,
where I(t) and T are terminal current of said each of said terminals and a period of said terminal current, respectively.
5. The method according to claim 4 , wherein said positive-component average current Iavg_p and said negative-component average current Iavg_n of said target branch are respectively represented by:
Iavg_p
=
min
(
∑
m
=
1
M
a
m
·
avg_n
m
,
∑
m
=
1
M
(
1
-
a
m
)
·
avg_p
m
,
)
,
and
Iavg_n
=
min
(
∑
m
=
1
M
a
m
·
avg_p
m
,
∑
m
=
1
M
(
1
-
a
m
)
·
avg_n
m
,
)
,
where m is said sequential number, M is the highest number of said sequential numbers, and a m =1 or a m =0 depending on a m-th terminal belonging to said positive-node terminal set or said negative-node terminal set.
6. A method for designing interconnects of an LSI, comprising the steps of:
preparing a netlist including a plurality of nets each specifying
performing a simulation for estimating a positive-component average current and a negative-component average current of each of said terminals;
separating a terminal set including a part of said terminals into a terminal sub-set and a complement of said terminal sub-set;
calculating a first sum of said negative-component average currents of said terminals belonging to said terminal sub-set and a second sum of said positive-component average current of said terminals belonging to said complement of said sub-set, to select a lower value of said first sum and said second sum as an average branch current of a target branch;
iterating said separating and calculating for another terminal set to calculate a plurality of average branch currents; and
designing a size of interconnect based on said average branch currents.
7. The method according to claim 6 , wherein said simulation performing step includes obtaining a waveform of a current of said each of said terminals.
8. The method according to claim 6 , wherein said positive-component average current avg_p and said negative-component average current avg_n of said each of said terminals are respectively represented by:
avg_p
=
1
2
T
∫
0
T
{
I
(
t
)
+
I
(
t
)
}
ⅆ
t
,
and
avg_n
=
1
2
T
∫
0
T
{
I
(
t
)
-
I
(
t
)
}
ⅆ
t
,
where I(t) and T are terminal current of said each of said terminals and a period of said terminal current, respectively.
9. A program stored on a medium for running on a computer system, said program defining the steps of:
preparing a netlist including a plurality of nets each specifying connection between two of terminals of circuit elements;
performing a simulation for estimating a positive-component average current and a negative-component average current of each of said terminals;
defining a graph including therein a set of nodes and a set of branches each connecting two of said nodes, said set of nodes including at least some of said terminals and branch points of at least some of said branches;
nominating two of said nodes connected by a target branch selected from said at least some of said branches as a positive node and a negative node based on a fixed rule, and separating said at least some of said terminals by said target branch into a positive-node terminal set and a negative-node terminal set corresponding to said positive node and said negative node;
calculating a first sum of said negative-component average currents of said terminals belonging to said positive-node terminal set and a second sum of said positive-component average currents of said terminals belonging to said negative-node terminal set, to select a lower value of said first sum and said second sum as a positive-component average current of said target branch;
calculating a third sum of said positive-component average currents of said terminals belonging to said positive-node terminal set and a fourth sum of said negative-component average currents of said terminals belonging to said negative-node terminal set, to select a lower value of said third sum and said fourth sum as a negative-component average current of said target branch; and
designing a size of an interconnect corresponding to said target branch based on said positive-component average current and said negative-component average current of said target branch.
10. A program stored on a medium for running on a computer system, said program defining the steps of:
preparing a netlist including a plurality of nets each specifying connection between two of terminals of circuit elements;
performing a simulation for estimating a positive-component average current and a negative-component average current of each of said terminals;
separating a terminal set including a part of said terminals into a terminal sub-set and a complement of said terminal sub-set;
calculating a first sum of said negative-component average currents of said terminals belonging to said terminal sub-set and a second sum of said positive-component average current of said terminals belonging to said complement of said sub-set, to select a lower value of said first sum and said second sum as an average branch current;
iterating said separating and calculating for another terminal set to calculate a plurality of average branch currents; and
designing a size of interconnect based on said average branch currents.