Image processor with noise reduction circuit
View Patent ↗A digital imaging system includes an image sensor, an interface circuit, a frame buffer and an image processor. The image sensor includes a two-dimensional array of pixel elements and outputs digital signals on a pixel bus as pixel data representing an image of a scene. The interface circuit is coupled to receive the pixel data from the pixel bus. The frame buffer is coupled to store pixel data provided by the interface circuit. The image processor operates to process the pixel data stored in the frame buffer to generate image data for displaying the image of the scene. The interface circuit includes a noise reduction circuit operated to perform signal processing on the pixel data received on the pixel bus for noise reduction. Thus, random noise such as readout noise can be eliminated as pixel data are being transferred from the image sensor and stored in the frame buffer.
1. A digital imaging system, comprising:
an image sensor comprising a two-dimensional array of pixel elements and an image buffer for storing pixel data of each captured image, said image sensor outputting digital signals on a pixel bus as pixel data representing an image of a scene;
an interface circuit coupled to receive said pixel data from said pixel bus;
a frame buffer, in communication with said interface circuit, coupled to store pixel data provided by said interface circuit; and
an image processor for processing said pixel data stored in said frame buffer to generate image data for displaying said image of said scene,
wherein said interface circuit comprises a noise reduction circuit performing signal processing on said pixel data received on said pixel bus for noise reductions wherein said noise reduction circuit performs a multisample averaging operation using a data and exposure time dependent blending coefficient, said noise reduction circuit performs said multisample averaging operation by averaging multiple reads of the same frame of pixel data provided by said image sensor and applying said data and exposure time dependent blending coefficient; and
wherein said noise reduction circuit calculates new pixel data for each frame of pixel data received using the equation: new data=α*input data+(1−α)*old data, where “new data” represents the final pixel data, “input data” represents the pixel data of a current frame to be averaged, “old data” represents pixel data previously averaged, and “α” represents said data and exposure time dependent blending coefficient.
2. The digital imaging system of claim 1 , wherein said noise reduction circuit further comprises a blending coefficient lookup table, said noise reduction circuit receiving previously averaged pixel data to index said blending coefficient lookup table, said blending coefficient lookup table providing a data dependent blending coefficient for averaging said current frame of pixel data.
3. The digital imaging system of claim 1 , wherein said noise reduction circuit further comprises a blending coefficient lookup table, said noise reduction circuit receiving a total exposure time value to index said blending coefficient lookup table, said blending coefficient lookup table providing an exposure time dependent blending coefficient for averaging said current frame of pixel data.