Control apparatus and method for controlling access to a memory in an integrated circuit for an electronic module

1. A control apparatus for controlling access to a memory in an integrated circuit for an electronic module, having:

a memory organized into a plurality of memory areas each containing data relating to the module;

a password register connected to said memory and configured to contain at least one password for a manufacturer of the module and at least one password for a user; and

an access controller connected to at least one of said memory and said password register, said access controller stipulating for at least one of said memory areas an extent to which said at least one memory area is at least one of readable and writeable, said at least one memory area having at least one stipulatable characteristic selected from the group consisting of;

said at least one memory area being readable when said password for the manufacturer is input;

said at least one memory area being readable when said password for the user is input;

said at least one memory area being readable without a password;

said at least one memory area being writeable when said password for the manufacturer is input;

said at least one memory area being writeable when said password for the user is input; and

said at least one memory area being writeable without a password.

2. The control apparatus according to claim 1 , where said access controller has:

a control register containing, for at least one of said memory areas, lock bits coding whether said at least one memory area is at least one of:

readable for the manufacturer;

writeable for the manufacturer;

readable for the user; and

writeable for the user; and

at least one control apparatus connected to said control register and to said password register and associated with a memory area under consideration, said at least one control apparatus taking account of said lock bits and of any password input to stipulate if said respective memory area under consideration is at least one of readable and writeable, and a manufacturer password input canceling an effect of a lock bit for the manufacturer and of a lock bit for a user, and a user password input canceling an effect of a lock bit for a user.

3. The control apparatus according to claim 2 , wherein said control register contains four lock bits for each of said memory areas, a first of said lock bits (VR 0 –VRn) stipulating if a respective one of said memory areas is readable for the manufacturer, a second of said lock bits (UR 0 –URn) stipulating if said one memory area is readable for a user, a third lock bit (VW 0 –VWn) stipulating if said one memory area is writeable for the manufacturer, and a fourth lock bit (UW 0 –UWn) stipulating if said one memory area is writeable for the user.

4. The control apparatus according to claim 3 , wherein said first lock bit (VR 0 –VRn) dominates said second lock bit (UR 0 –URn) and said third lock bit (VW 0 –VWn) dominates said fourth lock bit (UW 0 –UWn) to make a memory area stipulated as unreadable or unwriteable by said first and third memory bits be unreadable or unwriteable even if said second and fourth lock bits indicate that said memory area is readable or writeable.

5. The control apparatus according to claim 4 , wherein said access controller, said password register, and said memory take account of said lock bits and of any password input to stipulate that:

a memory area under consideration is readable when the manufacturer password is input if the first lock bit (VR 0 –VRn) is set to “Lock” and the manufacturer's password has been input correctly;

a memory area under consideration is readable for a user if said second lock bit (UR 0 –URn) in said control register is set to “Lock” and said password of the user has been input correctly and, at the same time, said first lock bit (VR 0 –VRn) is not set to “Lock”;

a memory area under consideration is readable without a password if both said first lock bit (VR 0 –VRn) and said second lock bit (UR 0 –URn) are not set to “Lock”;

a memory area under consideration is writeable for the manufacturer if said third lock bit (VW 0 –VWn) is set to “Lock” and said password of the manufacturer has been input correctly;

a memory area under consideration is writeable for a user if said fourth lock bit (UW 0 –UWn) in said control register is set to “Lock” and said password of the user has been input correctly and, at the same time, said third lock bit (VW 0 –VWn) is not set to “Lock”; and

a memory area under consideration is writeable without a password if both said third lock bit (VW 0 –VWn) and said fourth lock bit (UW 0 –UWn) are not set to “Lock”.

6. The control apparatus according to claim 3 , wherein said access controller, said password register, and said memory take account of said lock bits and of any password input to stipulate that:

a memory area under consideration is readable when the manufacturer password is input if the first lock bit (VR 0 –VRn) is set to “Lock” and the manufacturer's password has been input correctly;

a memory area under consideration is readable for a user if:

said second lock bit (UR 0 –URn) in said control register is set to “Lock” and said password of the user has been input correctly and, at the same time, said first lock bit (VR 0 –VRn) is not set to “Lock”;

a memory area under consideration is readable without a password if both said first lock bit (VR 0 –VRn) and said second lock bit (UR 0 –URn) are not set to “Lock”;

a memory area under consideration is writeable for the manufacturer if said third lock bit (VW 0 –VWn) is set to “Lock” and said password of the manufacturer has been input correctly;

a memory area under consideration is writeable for a user if said fourth lock bit (UW 0 –UWn) in said control register is set to “Lock” and said password of the user has been input correctly and, at the same time, said third lock bit (VW 0 –VWn) is not set to “Lock”; and

a memory area under consideration is writeable without a password if both said third lock bit (VW 0 –VWn) and said fourth lock bit (UW 0 –UWn) are not set to “Lock”.

7. The control apparatus according to claim 2 , wherein said lock bits in said control register are locked by a write protection.

8. The control apparatus according to claim 2 , wherein said lock bits in said control register are write protection locked.

9. The control apparatus according to claim 2 , wherein said lock bits in said control register can be overwritten only when a password is input, said lock bits relating to a readability and a writeability of said at least one memory area being able to be overwritten by one of the manufacturer and the user when the manufacturer password is input, and said lock bits relating to the readability and the writeability of said at least one memory area being able to be overwritten by a user when a user password is input.

10. The control apparatus according to claim 9 , wherein said lock bits relating to said memory areas that are one of readable and writeable only with said password of the manufacturer have absolute write protection when one of a given bit exists and a given bit combination exists.

11. The control apparatus according to claim 2 , wherein said lock bits relating to said memory areas that are one of readable and writeable only with said password of the manufacturer have absolute write protection when one of a given bit exists and a given bit combination exists.

12. The control apparatus according to claim 1 , wherein said password register contains at least one further manufacturer password enabling, upon input thereof, a further, otherwise unaddressable, memory area.

13. The control apparatus according to claim 1 , wherein said stipulation that a given memory area is writeable also includes a read authorization.

14. The control apparatus according to claim 1 , wherein the electronic module is an optoelectronic module.

15. A control apparatus for controlling access to a memory in an integrated circuit for an electronic module, having:

a memory divided into a plurality of memory areas each containing data relating to the module;

a password register connected to said memory and configured to contain at least one password for a manufacturer of the module and at least one password for a user; and

access control means connected to said memory, said access control means stipulating for at least one of said memory areas an extent to which said at least one memory area is readable or writeable, said at least one memory area having at least one stipulatable characteristic selected from the group consisting of;

said at least one memory area being readable when said password for the manufacturer is input;

said at least one memory area being readable when said password for the user is input;

said at least one memory area being readable without a password;

said at least one memory area being writeable when said password for the manufacturer is input;

said at least one memory area being writeable when said password for the user is input; and

said at least one memory area being writeable without a password.

16. A method for controlling access to a memory in an integrated circuit for an optoelectronic module, which comprises:

organizing a memory in the optoelectronic module into a plurality of memory areas;

a manufacturer:

writing to at least one of the memory areas; and

setting lock bits indicating which of the memory areas are locked for exclusive use by the manufacturer and are at least one of readable and writeable only with a manufacturer password;

a user writing to at least one of the memory areas not locked by the manufacturer; and

the user setting lock bits indicating which of the memory areas are at least one of readable and writeable only with a manufacturer password.

17. The method according to claim 16 , which further comprises:

providing four lock bits for each memory area, a first of the lock bits (VR 0 –VRn) stipulating if the memory area is readable for the manufacturer, a second of the lock bits (UR 0 –URn) stipulating if the memory area is readable for the user, a third of the lock bits (VW 0 –VWn) stipulating if the memory area is writeable for the manufacturer, and a fourth of the lock bits (UW 0 –UWn) stipulating if the memory area is writeable for the user; and

carrying out the manufacturer setting step by setting at least one of the first and third lock bits.

18. The method according to claim 17 , which further comprises carrying out the user setting step by setting at least one of the second and fourth lock bits.

19. The method according to claim 16 , which further comprises carrying out the user setting step by setting at least one of the second and fourth lock bits.