Memory cell isolation
View Patent ↗Device and method for memory cell isolation. The memory cell includes a resistive component, such as a magnetic random access memory (MRAM) cell, and an isolation component, such as a four-layer diode. The memory cell may be included in a memory array. The method includes rapidly applying a forward bias across the isolation element to activate the isolation element.
1. A method of operating a data storage device comprising a memory array of memory cells, the memory cells being located at cross points of word lines and bit lines, the method comprising:
selecting a memory cell that includes an isolation element and a resistive component, the resistive component having a state;
activating the isolation element by rapidly applying and fluctuating a forward bias across the isolation element; and
causing a current to flow through the selected memory cell in order to determine the state of the resistive component.
2. The method of claim 1 , wherein the selecting step comprises selecting the memory cell to include a four-layer diode as the isolation element.
3. The method of claim 1 , wherein the selecting step comprises selecting the memory cell to include a magnetic random access memory (MRAM) cell as the resistive component.
4. The method of claim 1 , further comprising de-activating the isolation element by applying a backward bias across the isolation element.
5. The method of claim 1 , further comprising de-activating the isolation element by operating an electrical switch to open a circuit that supplies the forward bias across the isolation element.
6. The method of claim 1 , further comprising de-activating the isolating element by applying a fluctuating backward bias across the isolation element.