Method and arrangement for protecting information
View Patent ↗An arrangement for protecting data saved in a memory, in which arrangement at least one memory element and at least one data processing element are combined by means of required interfaces into a data processing entity. The arrangement comprises at least one scrambler ( 300, 410, 600 ) connected to the data processing entity, which scrambler ( 300, 410, 600 ) scrambles the form in which the data to be saved in the memory element is represented and/or descrambles data saved in the memory element into plain text when data is taken from the memory element for the use of the data processing elements.
1. A method of protecting data saved in a memory, the method comprising:
combining at least one memory element and at least one data processing element by means of required interfaces into a data processing entity;
scrambling a form in which the data to be saved in the memory element is represented by means of at least one scrambler connected to the data processing entity, in such a way that data to be saved in different areas of the memory element is protected in different ways and the division of the memory element is implemented by using a configuration resister; and
descrambling data saved in the memory element by means of at least one scrambler connected to the data processing entity into plain text when data is taken from the memory element for the use of data processing elements.
2. The method according to claim 1 , wherein the scrambling comprises using the at least one scrambler that is on the same semiconductor chip as the memory element connected thereto.
3. The method according to claim 1 , wherein the scrambling comprises using the at least one scrambler that is in the same package as the memory element connected thereto.
4. The method according to claim 1 , wherein the scrambling comprises using the at least one scrambler and the memory element connected thereto that are positioned on different printed boards.
5. The method according to claim 1 , wherein the descrambling comprises using the at least one data processing element that is an application specific integrated circuit.
6. The method according to claim 1 , wherein the descrambling comprises using at least one data processing element that is a processor.
7. The method according to claim 1 , wherein the scrambling comprises using the at least one scrambler that is implemented by means of an interleaver and a de-interleaver.
8. The method according to claim 1 , wherein the scrambling comprises using the at least one scrambler that is implemented by means of an encoder and a decoder.
9. The method according to claim 1 , wherein the scrambling comprises using the at least one scrambler that is implemented by means of an encryption algorithm.
10. The method according to claim 1 , wherein the scrambling comprises using the at least one scrambler that further comprises a bus adapter element.
11. The method according to claim 1 , wherein the scrambler processes user data.
12. The method according to claim 1 , wherein the scrambler processes commands.
13. The method according to claim 1 , wherein the scrambling comprises using the at least one scrambler that further comprises a configuration register.
14. The method according to claim 1 , wherein all data to be saved in the memory element is protected by means of the scrambling process.
15. The method according to claim 1 , further comprising:
protecting a predetermined part of the data to be saved in the memory element by means of the scrambling process.
16. The method according to claim 1 , further comprising:
protecting data to be saved in different areas of the memory element in different ways by means of the scrambling process.
17. The method according to claim 1 , wherein scrambling comprises using the at least one scrambler that is adapted to buses in such a way that it is a transparent element from the point of view of the data processing entity.
18. An arrangement for protecting data saved in a memory, the arrangement comprising:
at least one memory element and at least one data processing element combined by means of required interfaces into a data processing entity; and
at least one scrambler connected to the data processing entity, and configured to scramble a form in which the data to be saved in the memory element is represented or configured to descramble data saved in the memory element into plain text when data is taken from the memory element for the use of the data processing elements, and where data to be saved in different areas of the memory element is protected in different ways and the division of the memory element is implemented by using a configuration register.
19. An arrangement for protecting data saved in a memory, the arrangement comprising:
at least one memory element and at least one data processing element combined by means of required interfaces into a data processing entity; and
at least one scrambler connected to the data processing entity, and configured to scramble a form in which the data to be saved in the memory element is represented and configured to descramble data saved in the memory element into plain text when data is taken from the memory element for the use of the data processing elements, and where data to be saved in different areas of the memory element is protected in different ways and the division of the memory element is implemented by using a configuration register.
20. The arrangement according to claim 19 , wherein at least one data processing element is an application specific integrated circuit.
21. The arrangement according to claim 19 , wherein at least one data processing element is a processor.
22. The arrangement according to claim 19 , wherein the scrambler is implemented by means of an interleaver and a de-interleaver.
23. The arrangement according to claim 19 , wherein the scrambler is implemented by means of an encoder and a decoder.
24. The arrangement according to claim 19 , wherein the scrambler is implemented by means of an encryption algorithm.
25. The arrangement according to claim 19 , wherein the scrambler comprises a bus adapter element.
26. The arrangement according to claim 19 , wherein the scrambler processes user data.
27. The arrangement according to claim 19 , wherein the scrambler processes commands.
28. The arrangement according to claim 19 , wherein the scrambler comprises a configuration register.
29. The arrangement according to claim 19 , wherein all data to be saved in the memory element is protected by means of the scrambler.
30. The arrangement according to claim 19 , wherein a predetermined part of the data to be saved in the memory element is protected by means of the scrambler.
31. The arrangement according to claim 19 , wherein data to be saved in different areas of the memory element is protected in different ways by means of the scrambler.
32. The arrangement according to claim 19 , wherein the scrambler is adapted to buses in such a way that it is a transparent element from the point of view of the data processing entity.
33. The arrangement according to claim 19 , wherein the scrambler is adapted to a bus with a compressor/decompressor.
34. An arrangement for protecting data saved in a memory, the arrangement is configured to:
combine at least one memory element and at least one data processing element by means of required interfaces into a dato processng entity;
scramble connected to the data processing entity, wherein the scrambler is configured to scramble a form in which the data to be saved in the memory element is represented and
descramble data saved in the memory element into plain text when data is taken from the memory element for the use of the data processing elements, wherein data to be saved in different areas of the memory element is protected in different ways and the division of the memory element is implemented by using a configuration register.
35. An arrangement for protecting data saved in a memory, the arrangement comprising:
at least one memory element and at least one data processing element combined by means of required interfaces into a data processing entity; and
at least one scrambler means, connected to the data processing entity, for scrambling a form in which the data to be saved in the memory element is represented or for descrambling data saved in the memory element into plain text when data is taken from the memory element for the use of the data processing elements, and where data to be saved in different areas of the memory element is protected in different ways and the division of the memory element is implemented by using a configured register.
36. An arrangement for protecting data saved in a memory, the arrangement comprising:
at least one memory element and at least one data processing element combined by means of required interfaces into a data processing entity; and
at least one scrambler means, connected to the data processing entity, for scrambling a form in which the data to be saved in the memory element is represented and for descrambling data saved in the memory element into plain text when data is taken from the memory element means for the use of the data processing elements, and where data to be saved in different areas of the memory element is protected in different ways and the division of the memory element is implemented by using a configured register.