IP Library Granted Patent US 7,342,909
Granted Patent B2
US 7,342,909 · App. 10/642,679 · Granted Mar 11, 2008

CDMA transmitter, CDMA multiplex transmitter, CDMA receiver and CDMA communication system

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,342,909
App. No.
10/642,679
Granted
Mar 11, 2008
Kind
B2
Abstract

According to a CDMA communication system for the present invention, the transmission side for each channel increases the amplitude of a time slot period for self-channel synchronization until greater than the amplitude for another period, and outputs the resultant signal as a modulation signal. The reception side obtains a correlation between a multiplex signal obtained by superimposing modulation signals for multiple channels, and a spreading code allocated for the self-channel. Since the amplitude of the time slot period for the self-channel synchronization is increased by the transmission side, the large value portion indicating the synchronization timing is included in the correlation signal, and by detecting this value, the reception side can easily obtain the synchronization timing.

Claims (25)

1. A CDMA transmitter comprising:

spreading means for employing a spreading code allocated for a self-channel to spread a transmission signal, for which a time slot having a predetermined cycle and having a different timing from that of a different channel is allocated to a synchronization time slot for the self-channel, and which is synchronized with a transmission signal for the different channel and for outputting a spreading signal;

power control means for increasing, until greater than an amplitude for a spreading signal for a different period, an amplitude for a period for the synchronization time slot of the self-channel that is included in the spreading signal, and for outputting the resultant signal as a modulation signal; and

no signal power setting means for performing a no signal power setting for the period for the synchronization time slot of the different channel that is included in the modulation signal,

wherein a sync bit is inserted into the synchronization time slot.

2. A CDMA transmitter according to claim 1 , wherein the power control means also serves as the no signal power setting means, and wherein to perform a no signal power setting, the power control means halts the signal input or the signal output during the period for the synchronization time slot of the different channel.

3. A CDMA transmitter according to claim 1 , wherein the spreading means also serves as the no signal power setting means, and wherein, to perform the no signal power setting, the spreading means halts the spreading during the period of the synchronization time slot for the different channel.

4. A CDMA multiplex transmitter comprising:

a plurality of CDMA transmitters according to claim 1 ; and

multiplexing means for superimposing modulation signals received from the CDMA transmitters.

5. A CDMA multiplex transmitter according to claim 4 , further comprising:

frame processing means for forming normal signals for synchronization time slots, which are to be transmitted to the CDMA transmitters.

6. A CDMA multiplex transmitter according to claim 5 , wherein the frame processing means adds a sync bit to a transmission signal for each channel, and forms a signal to be transmitted to each of the CDMA transmitters.

7. A CDMA receiver comprising:

correlation means for obtaining a correlation between a multiplex signal received from a CDMA multiplex transmitter according to claim 4 , and a spreading code allocated to a respective self-channel, and for outputting a correlation signal;

synchronization timing detection means for, upon the reception of the correlation signal from the correlation means, identifying a large positive and/or negative correlation value portion included in a respective synchronization time slot for the respective self-channel;

clock regeneration means for employing the output of the synchronization timing detection means to produce a regenerated clock having a time slot cycle; and

gate means for sampling, in accordance with the regenerated clock, the correlation signal or a signal obtained by wave-shaping the correlation signal, and for reproducing a transmission signal.

8. A CDMA receiver according to claim 7 , further comprising:

frame removal means for removing a sync bit from an output signal of the gate means.

9. A CDMA communication system comprising:

a CDMA multiplex transmitter according to claim 4 ; and

a plurality of CDMA receivers according to claim 7 .

10. A CDMA communication system comprising:

a plurality of CDMA transmitters according to claim 1 ; and a plurality of CDMA receivers according to claim 7 .

Assignments (5)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 27, 2021
From: CAVIUM INTERNATIONAL
To: MARVELL ASIA PTE LTD.
Reel/Frame 057336/0873 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 25, 2021
From: MARVELL TECHNOLOGY CAYMAN I
To: CAVIUM INTERNATIONAL
Reel/Frame 057279/0519 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 23, 2021
From: INPHI CORPORATION
To: MARVELL TECHNOLOGY CAYMAN I
Reel/Frame 056649/0823 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 7, 2014
From: GLOBAL D, LLC.
To: INPHI CORPORATION
Reel/Frame 034193/0116 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 14, 2014
From: OKI ELECTRIC INDUSTRY CO., LTD.
To: GLOBAL D, LLC.
Reel/Frame 033546/0400 →