IP Library Granted Patent US 7,039,892
Granted Patent B2
US 7,039,892 · App. 10/643,397 · Granted May 2, 2006

Systems and methods for ensuring correct connectivity between circuit designs

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Quick Facts
Patent No.
US 7,039,892
App. No.
10/643,397
Granted
May 2, 2006
Kind
B2
Abstract

Systems, methods and software products ensure correct connectivity between circuit designs. A list of connections of the circuit designs is generated. One or more mapping files are generated from the list to correlate connections between the circuit designs. The mapping file is regenerated in response to modification of at least one of the circuit designs. Optionally, at least one schematic associated with at least one of the circuit designs is regenerated using information in the regenerated mapping file

Claims (32)

1. A system for ensuring correct connectivity between circuit designs, comprising:

configuration files defining connections of the circuit designs;

at least one mapping file correlating connections between the configuration files; and

a processing section for updating the mapping file in response to changes of the circuit designs, and for processing the configuration files and the mapping file in generating the circuit designs.

2. The system of claim 1 , the mapping file initially being generated from a list of interconnectivity signals.

3. The system of claim 2 , wherein the list comprises one or more spreadsheets.

4. The system of claim 2 , further comprising a user interface for connection to one or more user stations used in generating the interconnectivity signals.

5. The system of claim 1 , further comprising a user interface for connection to one or more user stations used in inputting the changes to the circuit designs.

6. The system of claim 1 , wherein the configuration files comprise symbol files representing parts within the circuit designs.

7. The system of claim 6 , wherein the configuration files comprise geometry files representing physical attributes of the parts.

8. The system of claim 1 , the processing section responsive to design changes of at least one of the circuit designs to automatically update the mapping file.

9. The system of claim 8 , the processing section responsive to updating of the mapping file to update at least one schematic for at least one of the circuit designs.

10. The system of claim 1 , the processing section responsive to design changes of at least one connector of the circuit designs to automatically update the mapping file.

11. The system of claim 10 , the processing section responsive to updating of the mapping file to generate at least one notification of the design changes.

12. The system of claim 1 , wherein the processing section generates one or more notifications indicating connectivity changes between the circuit designs.

13. A system for ensuring correct connectivity between circuit designs, comprising:

means for generating at least one mapping file to correlate connections between configuration files of the circuit designs;

means for updating the mapping file in response to a change of the circuit design; and

means for processing the configuration files and the mapping file in generating the circuit designs.

14. The system of claim 13 , wherein the configuration files having one or both of symbol files and geometry files.

15. The system of claim 13 , further comprising means for formulating the mapping file from an input list.

16. The system of claim 15 , the input list comprising a spreadsheet.

17. A method for ensuring correct connectivity between circuit designs, comprising:

A) generating a list of connections of the circuit designs;

B) generating a mapping file from the list to correlate connections between the circuit designs; and

C) re-generating the mapping file in response to modification of at least one of the circuit designs.

18. The method of claim 17 , further comprising generating at least one schematic associated with at least one of the circuit designs using information in the regenerated mapping file.

19. A software product comprising instructions, stored on computer-readable media, wherein the instructions, when executed by a computer, perform steps for ensuring correct connectivity between circuit designs, comprising:

instructions for generating a list of connections of the circuit designs;

instructions for generating a mapping file from the list to correlate connections between the circuit designs; and

instructions for re-generating the mapping file in response to modification of at least one of the circuit designs.

20. The software product of claim 19 , further comprising instructions for generating at least one schematic associated with at least one of the circuit designs using information in the regenerated mapping file.