Solid state image sensor
View Patent ↗An active pixel image sensor is formed on a P-type epitaxial layer on a P-type substrate. An active pixel array is in the P-type epitaxial layer. Each pixel includes an N-well functioning as a collection node, and a P-well adjacent the N-well. The P-well includes only NMOS transistors functioning as active elements. The in-pixel transistors cooperate with off-pixel PMOS transistors to form A-D converters.
1. A solid state image sensor comprising:
a substrate of a first conductivity type;
an epitaxial layer of the first conductivity type on said substrate;
an active pixel array in said epitaxial layer, each pixel comprising
a first well of a second conductivity type functioning as a collection node,
at least one second well of the first conductivity type adjacent said first well, and
a plurality of MOS transistors of only the second conductivity type functioning as active elements of said pixel; and
circuit elements external said active pixel array, said external circuit elements comprising a respective comparator and counter for each pixel.
2. A solid state image sensor according to claim 1 , wherein the first conductivity type comprises a P-type conductivity, and the second conductivity type comprises an N-type conductivity.
3. A solid state image sensor according to claim 1 , wherein the first conductivity type comprises an N-type conductivity, and the second conductivity type comprises a P-type conductivity.
4. A solid state image sensor according to claim 1 , and wherein said active elements in each pixel and said external circuit elements form part of an analog-to-digital converter.
5. A solid state image sensor according to claim 4 , wherein said active elements in each pixel form an amplifier connected to said comparator for forming part of the analog-to-digital converter.
6. A solid state image sensor according to claim 5 , wherein said active elements in each pixel are selectively switched to said comparator.
7. A solid state image sensor according to claim 5 , wherein said circuit elements external each pixel comprise at least one current mirror connected to said comparator; and wherein said active elements in each pixel form a differential amplifier for receiving a pixel photodiode voltage and a reference voltage, and for providing a balanced output to said at least one current mirror connected thereto.
8. A solid state image sensor according to claim 7 , wherein the reference voltage is ramped during a time when each pixel is integrating a photo induced current.
9. A solid state image sensor according to claim 7 , wherein the reference voltage is ramped during reset of each pixel to provide an offset compensation.
10. A solid state image sensor according to claim 5 , further comprising a latch connected to said at least one comparator in which a count is latched by a change of state of said at least one comparator.
11. A solid state image sensor according to claim 10 , further comprising a frame store circuit connected to said latch for receiving the count latched by said latch.
12. A solid state image sensor comprising:
a substrate of a first conductivity type;
an epitaxial layer of the first conductivity type on said substrate;
an active pixel array in said epitaxial layer, each pixel comprising
a first well of a second conductivity type functioning as a collection node,
at least one second well of the first conductivity type adjacent said first well, and
a plurality of MOS transistors of only the second conductivity type functioning as active elements of said pixel; and
circuit elements external said active pixel array, said external circuit elements comprising comparators and counters, and wherein a number of pixels in a given row or column of said active pixel array share a single comparator and counter, with the corresponding pixels in the given row or column being enabled sequentially.
13. A solid state image sensor according to claim 12 , wherein said active elements in each pixel form a differential amplifier, and outputs of said differential amplifier are multiplexed to a pair of output lines common to the corresponding pixels in the given row or column.
14. A solid state image sensor according to claim 13 , wherein the active elements in each pixel further comprise cascode transistors connected to the outputs of each differential amplifier.
15. A solid state image sensor comprising:
a substrate;
an active pixel array in said substrate, each pixel comprising
a first well of a first conductivity type functioning as a collection node,
at least one second well of a second conductivity type adjacent said first well, and
a plurality of MOS transistors of only the first conductivity type functioning as active elements; and
circuit elements in said substrate and external said active pixel array and forming analog-to-digital converters with the active elements therein, the external circuit elements further comprising a respective comparator and counter for each pixel.
16. A solid state image sensor according to claim 15 , wherein said substrate is of the second conductivity type; and wherein the first conductivity type comprises a P-type conductivity and the second conductivity type comprises an N-type conductivity.
17. A solid state image sensor according to claim 15 , wherein said substrate is of the first conductivity type; and wherein the first conductivity type comprises a N-type conductivity and the second conductivity type comprises a P-type conductivity.
18. A solid state image sensor according to claim 15 , wherein said active elements in each pixel form an amplifier connected to said comparator for forming an analog-to-digital converter.
19. A solid state image sensor according to claim 18 , wherein said active elements in each pixel are selectively switched to said comparator.
20. A solid state image sensor according to claim 18 , wherein said circuit elements external each pixel comprise at least one current mirror connected to said at least one comparator; and wherein said active elements in each pixel form a differential amplifier for receiving a pixel photodiode voltage and a reference voltage, and for providing a balanced output to said at least one current mirror connected thereto.
21. A solid state image sensor according to claim 20 , wherein the reference voltage is ramped during a time when each pixel is integrating a photo induced current.
22. A solid state image sensor according to claim 20 , wherein the reference voltage is ramped during reset of each pixel to provide an offset compensation.
23. A solid state image sensor according to claim 18 , further comprising a latch connected to said comparator in which a count is latched by a change of state of said at least one comparator.
24. A solid state image sensor according to claim 23 , further comprising a frame store circuit connected to said latch for receiving the count latched by said latch.
25. A solid state image sensor comprising:
a substrate;
an active pixel array in said substrate, each pixel comprising
a first well of a first conductivity type functioning as a collection node,
at least one second well of a second conductivity type adjacent said first well, and
a plurality of MOS transistors of only the first conductivity type functioning as active elements; and
circuit elements in said substrate and external said active pixel array and forming analogtodigital converters with the active elements therein;
wherein said circuit elements external each pixel further comprise comparators and counters for said active pixel array, and wherein a number of pixels in a given row or column of said active pixel array share a single comparator and counter, with the pixels being enabled sequentially.
26. A solid state image sensor according to claim 25 , wherein said active elements in each pixel form a differential amplifier, and outputs of said differential amplifier are multiplexed to a pair of output lines common to the corresponding pixels in the given row or column.
27. A solid state image sensor according to claim 26 , wherein the active elements in each pixel further comprise cascode transistors connected to the outputs of each differential amplifier.
28. A method for making a solid state image sensor comprising:
forming an active pixel array in a substrate, and forming each pixel comprising
forming a first well of a first conductivity type functioning as a collection node,
forming at least one second well of a second conductivity type adjacent the first well,
forming a plurality of MOS transistors of only the first conductivl,ty type functioning as active elements; and
forming circuit elements in the substrate external the active pixel array and forming analog-to-digital converters with the active elements therein;
wherein the circuit elements external each pixel further comprise a respective comparator and counter for each pixel.
29. A method according to claim 28 , wherein the active elements in each pixel form an amplifier connected to the at least one comparator for forming an analog-to-digital converter.
30. A method according to claim 29 , wherein the active elements in each pixel are selectively switched to the comparator.
31. A method according to claim 29 , wherein the circuit elements external each pixel comprise at least one current mirror connected to the comparator; and wherein the active elements in each pixel form a differential amplifier for receiving a pixel photodiode voltage and a reference voltage, and for providing a balanced output to the at least one current mirror connected thereto.
32. A method according to claim 29 , further comprising a latch connected to the comparator in which a count is latched by a change of state of the comparator.
33. A method according to claim 32 , further comprising a frame store circuit connected to the latch for receiving the count latched by the latch.
34. A method for making a solid state image sensor comprising:
forming an active pixel array in a substrate, and forming each pixel comprising
forming a first well of a first conductivity type functioning as a collection node,
forming at least one second well of a second conductivity type adjacent the first well,
forming a plurality of MOS transistors of only the first conductivity type functioning as active elements; and
forming circuit elements in the substrate external the active pixel array and forming analog-to digital converters with the active elements therein, wherein the circuit elements external each pixel further comprise comparators and counters far the active pixel array, and wherein a number of pixels in a given row or column of the active pixel array share a single comparator and counter, with the pixels being enabled sequentially.
35. A method according to claim 34 , wherein the active elements in each pixel form a differential amplifier, and outputs of the differential amplifier are multiplexed to a pair of output lines common to the corresponding pixels in the given row or coluxnn.