Power devices and methods for manufacturing the same
View Patent ↗Power devices in which a low on-resistance can be obtained while maintaining a high breakdown voltage and a method for manufacturing the power devices are described. The power device includes a semiconductor substrate having a first conductivity type, a burying layer having a high concentration of a second conductivity type arranged deep in the semiconductor substrate, a well having a low concentration of a second conductivity type formed on the burying layer of the semiconductor substrate, a body region having a first conductivity type formed in a predetermined portion in the well having a low concentration of a second conductivity type, first and second channel stop regions having a low concentration of a second conductivity type, the first and second channel stop regions are formed in a predetermined portion of the body region and on both edges of the body region having a first conductivity type, a gate electrode including a gate insulating layer, formed on a space between the first and second channel stop regions, source and drain regions having a high concentration of a second conductivity type formed in the first and second channel stop regions on both sides of the gate electrode, and a body contact region formed in the source region. Only the body region having a first conductivity type exists between the first and second channel stop regions, and a channel is formed between the first and second channel stop regions.
1. A power device comprising:
a semiconductor substrate having a first conductivity type;
a burying layer having a high concentration of a second conductivity type arranged deep in the semiconductor substrate;
a well having a low concentration of a second conductivity type formed on the burying layer of the semiconductor substrate;
a body region having a first conductivity type formed in a predetermined portion in the well having a low concentration of a second conductivity type;
first and second channel stop regions having a low concentration of a second conductivity type, the first channel stop region being formed in a predetermined portion of the body region and the second channel stop region being formed on at least one side of the body region having a first conductivity type;
a gate electrode including a gate insulating layer, formed on a space between the first and second channel stop regions;
source and drain regions having a high concentration of a second conductivity type formed in the first and second channel stop regions on both sides of the gate electrode; and
a body contact region formed in the source region;
wherein only the body region having a first conductivity type exists between the first and second channel stop regions, and a channel is formed between the first and second channel stop regions such that a uniform concentration can be obtained in a channel region.
2. The power device of claim 1 , wherein the first and second channel stop regions are spaced apart from each other by a channel expected distance.
3. The power device of claim 1 , wherein the first and second channel stop regions have a concentration higher than that of the well.
4. The power device of claim 3 , wherein the first and second channel stop regions have enough low impurity concentration so that a desired breakdown voltage can be obtained.
5. The power device of claim 1 , wherein the body region having a first conductivity type has a sufficient high impurity concentration so that punch-through can be prevented.
6. The power device of claim 1 , wherein junction depths of the source and drain regions are the same as or smaller than those of the first and second channel stop regions.
7. The power device of claim 6 , wherein the first and second channel stop regions have enough low impurity concentration so that a desired breakdown voltage can be obtained.
8. The power device of claim 1 , wherein the first conductivity type is a p-type, and the second conductivity type is an n-type.
9. The power device of claim 1 , wherein the gate insulating layer includes a fist gate insulating layer having a thin film and a second gate insulating layer having a thick film, which are connected to each other without cutting.
10. The power device of claim 9 , wherein the gate electrode includes part of the first channel stop region, part of the body region, part of the second channel stop region, and part of the second gate insulating layer.
11. A transistor, comprising:
a substrate having a first conductivity type containing a well having a low concentration of a second conductivity type;
a body region having a first conductivity type formed in a portion of the well; and
first and second channel stop regions having a low concentration of a second conductivity type, the first channel stop region formed in a portion of the body region and the second channel stop region formed on a side of the body region;
wherein a channel with a substantially uniform impurity concentration is located between the first and second channel stop regions.
12. The transistor of claim 11 , further comprising a buried layer with a high concentration of a second conductivity type located between the substrate and the well.
13. The transistor of claim 11 , further comprising source and drain regions having a high concentration of a second conductivity type formed in the first and second channel stop regions.
14. The transistor of claim 11 , wherein only the body region exists between the first and second channel stop regions.
15. The transistor of claim 11 , wherein the first and second channel stop regions have a concentration higher than that of the well.
16. The transistor of claim 15 , wherein the first and second channel stop regions have a concentration low enough so that a desired breakdown voltage can be obtained.
17. The transistor of claim 11 , wherein the body region has a concentration so that punch-through can be reduced.