IP Library Granted Patent US 7,049,669
Granted Patent B2
US 7,049,669 · App. 10/663,051 · Granted May 23, 2006

LDMOS transistor

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Quick Facts
Patent No.
US 7,049,669
App. No.
10/663,051
Granted
May 23, 2006
Kind
B2
Abstract

A semiconductor device comprises an active region of a first conductivity type including a transistor structure, and a ring shaped region of the first conductivity type extending from a surface of the active region into the active region and substantially surrounding the transistor structure.

Claims (40)

1. A semiconductor device comprising:

an active region of a first conductivity type including a two transistor structure comprising a stripe shaped drain region and a first stripe shaped source region arranged on one side of the stripe shaped drain region and a second stripe shaped source region arranged on the opposite side of the stripe shaped drain region, wherein the drain and the first and second source each define a first and second stripe shaped channel, a first and second gate being arranged above said first and second channel,

a ring shaped region of the first conductivity type extending from a surface of the active region into the active region, wherein the ring shaped structure partially overlaps the first and second stripe shaped source region and, thus, substantially surrounds the transistor structure.

2. The device as in claim 1 , wherein the transistor structure further comprises a first and second sinker structure of said first conductivity type arranged substantially along said first and second source region, respectively reaching from the surface of the active area next to the first and second source region to the bottom of the active area.

3. The device as in claim 2 , wherein the p ring is less doped than the first or second sinker structure.

4. The device as in claim 2 , wherein the drain region comprises a lightly doped drain region.

5. The device as in claim 4 , further comprising a metal layer on the backside of the semiconductor device.

6. The device as in claim 1 , wherein the drain region comprises a lightly doped drain region.

7. The device as in claim 1 , further comprising a metal layer on the backside of the semiconductor device.

8. The device as in claim 1 , wherein the ring shaped region is less doped than the sinker structure.

9. The device as in claim 1 , wherein the ring is doped in the range of 10 14 –10 15 /cm 2 .

10. The device as in claim 9 wherein boron is used as a dopant.

11. The device as in claim 1 , wherein the active area comprises a substrate and an epitaxial layer on top of said substrate.

12. The device as in claim 1 , wherein the first conductivity type is the p type.

13. The device as in claim 1 , wherein the ring has a rectangular, circular, oval, or polygon shape.

14. The device as in claim 1 , wherein the ring comprises at least one gap that does not substantially influence an insulating function of the ring.

15. A semiconductor device comprising:

an active region of a first conductivity type including a two transistor structure, wherein the two transistor structure comprises, a common drain region of a second type, a first source region of the second type arranged along one side of the common drain region, a second source region of the second type arranged on the respective opposite side of the common drain region, first and second channels formed between said first source region and said common drain region and between said second source region and said common drain region, and first and second gates being arranged above said first and second channel, respectively, and

a ring shaped region of the first conductivity type extending from a surface of the active region into the active region thereby partially overlapping said first and second source region and surrounding the transistor structure.

16. The device as in claim 15 , further comprising first and second sinker structures of said first conductivity type arranged substantially along said first and second source regions, respectively reaching from the surface of the active area next to the source region to the bottom of the active area.

17. The device as in claim 16 , further comprising a metal layer on the backside of the semiconductor device.

18. The device as in claim 16 , wherein the ring is less doped than the first and second sinker structures.

19. The device as in claim 15 , wherein the drain region comprises a lightly doped drain region.

20. The device as in claim 15 , wherein the ring is doped in the range of 10 14 –10 15 /cm 2 .

21. The device as in claim 20 , wherein boron is used as a dopant.

22. The device as in claim 15 , wherein the active area comprises a substrate and an epitaxial layer on top of said substrate.

23. The device as in claim 15 , wherein the first conductivity type is the p type.

24. The device as in claim 15 , wherein the ring has a rectangular, circular, oval, polygon, or partially open shape.

25. The device as in claim 15 , wherein the ring comprises at least one gap that does not substantially influence an insulating function of the ring.

26. A method of manufacturing a semiconductor device comprising the steps of:

forming an active region of a first conductivity type within a semiconductor material;

forming a transistor structure comprising a stripe shaped drain region and a first stripe shaped source region arranged on one side of the stripe shaped drain region and a second stripe shaped source region arranged on the opposite side of the stripe shaped drain region, wherein the drain and the first and second source each define a first and second stripe shaped channel, respectively, a first and second gate being arranged above said first and second channel, respectively, and

forming a ring shaped region of the first conductivity type extending from a surface of the active region into the active region, wherein the ring shaped structure partially overlaps the first and second stripe shaped source regions and, thus, surrounds the transistor structure.

27. The method as in claim 26 , wherein the step of forming a transistor structure comprises the step of forming a sinker structure of said first conductivity type arranged substantially along said source region reaching from the surface of the active area next to the source region to the bottom of the active area.

28. The method as in claim 27 , further comprising the step of arranging a metal layer on the backside of the semiconductor device.

29. The method as in claim 26 , wherein the drain region is formed in such a way that it comprises a lightly doped drain region.

30. The device as in claim 26 , wherein the step of forming the ring includes the step of doping the ring less than the sinker structure.

31. The method as in claim 26 , wherein the ring is doped in the range of 10 14 –10 15 /cm 2 .

32. The method as in claim 26 , wherein boron is used as a dopant.

33. The method as in claim 26 , wherein the ring has a rectangular, circular, oval, polygon, or partially open shape.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 26, 2004
From: INFINEON TECHNOLOGIES WIRELESS SOLUTIONS SWEDEN AB
To: INFINEON TECHNOLOGIES AG
Reel/Frame 015036/0234 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 17, 2004
From: INFINEON TECHNOLOGIES NORTH AMERICA CORP.
To: INFINEON TECHNOLOGIES AG
Reel/Frame 014995/0676 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 13, 2004
From: CHEN, QIANG
To: INFINEON TECHNOLOGIES WIRELESS SOLUTIONS SWEDEN AB
Reel/Frame 014878/0341 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 12, 2004
From: MA, GORDON
To: INFINEON TECHNOLOGIES NORTH AMERICA CORP.
Reel/Frame 014880/0642 →