Reducing transient current caused by capacitance during high speed switching
An isolation resistor is inserted in series between a current source and the emitters of bipolar switching transistors in a differential amplifier. The switching transistors may also be MOSFETs. The in-rush current through the resistor, due to a parasitic or added capacitance, creates a certain increased voltage drop across the resistor, reducing dv/dt and thus reducing the transient in-rush current into the capacitor. This results in reduced waveform distortion. Such an isolation resistor between a current carrying terminal of a switching bipolar transistor and a current source may be used in various applications, including an emitter follower.
1. A switching circuit comprising:
a first switching transistor having a control terminal coupled to a first input signal and having a first current carrying terminal;
a first current source, providing a fixed current, coupled to the first current carrying terminal;
a first isolation resistor connected in series between the first current carrying terminal and the current source, the isolation resistor reducing an in-rush current into a capacitance between the first isolation resistor and the current source to reduce distortion in an output signal of the circuit when the first switching transistor is switched,
wherein the first switching transistor forms part of a differential pair of switching transistors, the circuit further comprising:
a second switching transistor with a control terminal coupled to a second input signal and having a second current carrying terminal coupled to the first current carrying terminal of the first switching transistor, wherein the first switching transistor and the second switching transistor are bipolar transistors, and the first and second current carrying terminals are emitters of the first and second switching transistors;
a second isolation resistor coupled in series directly between the first current carrying terminal of the first switching transistor and the second current carrying terminal of the second switching transistor;
a second current source, providing a fixed current; and
a third isolation resistor in series between the second current carrying terminal and the second current source.
2. The circuit of claim 1 wherein the first switching transistor comprises an NPN bipolar transistor.
3. A method of operation of a switching circuit, the switching circuit comprising a first switching transistor having a control terminal coupled to a first input signal and having a first current carrying terminal; a first current source, providing a fixed current, coupled to the first current carrying terminal; and a first isolation resistor connected in series between the first current carrying terminal and the current source, the method comprising:
conducting a current through the isolation resistor during switching of the switching transistor to reduce an in-rush current into a capacitance between the first isolation resistor and the current source to reduce distortion in an output signal of the circuit when the first switching transistor is switched,
wherein the first switching transistor forms part of a differential pair of switching transistors, the circuit further comprising a second switching transistor with a control terminal coupled to a second input signal and having a second current carrying terminal coupled to the first current carrying terminal of the first switching transistor, wherein the first switching transistor and the second switching transistor are bipolar transistors, and the first and second current carrying terminals are emitters of the first and second switching transistors;
a second isolation resistor coupled in series directly between the first current carrying terminal of the first switching transistor and the second current carrying terminal of the second switching transistor, wherein the first switching transistor and the second switching transistor arc bipolar transistors, and wherein the circuit farther comprises a second current source, providing a fixed current, and a third isolation resistor in series between the second current carrying terminal and the second current source, the method further comprising:
at least partially isolating effects of parasitic capacitances of the first switching transistor and the second switching transistor during switching by reducing transient current through the second isolation resistor flowing between the first switching transistor and second switching transistor; and
conducting a current through the third isolation resistor during switching of the second switching transistor to reduce an in-rush current into a capacitance between the third isolation resistor and the second current source to reduce distortion in an output signal of the circuit when tbe second switching transistor is switched.
4. The method of claim 3 wherein the first switching transistor comprises an NPN bipolar transistor.