Liquid crystal display device having wide viewing angles and method of fabricating the same
View Patent ↗A liquid crystal display (LCD) device includes a first substrate having at least one pixel region and a black matrix, a common electrode beneath the first substrate, a first alignment layer beneath the common electrode, a first linear polarizer along an outer side surface of the first substrate, a second substrate having at least one pixel portion corresponding to the pixel region of the first substrate, the pixel portion being divided into first and second areas, gate and data lines provided on both the first and second areas of the second substrate, the gate and data lines crossing each other, a first switching element provided at a cross point of the gate and data lines within the first area, a second switching element formed at a cross point of the gate and data lines within the second area, a first pixel electrode within the first area connected to the first switching element, a second pixel electrode within the second area connected to the second switching element, a first retardation layer having a first phase retardation value formed beneath the first pixel electrode, a second retardation layer having a second phase retardation value different from the first phase retardation value formed beneath the second pixel electrode, a second alignment layer provided on the first and second pixel electrodes, a liquid crystal layer disposed between the first and second alignment layers, and a second linear polarizer provided along an outer side surface of the second substrate.
1. A liquid crystal display (LCD) device, comprising:
a first substrate having at least one pixel region defined thereon and a black matrix along a boundary region of the pixel region;
a common electrode beneath the first substrate upon which the black matrix is formed;
a first alignment layer beneath the common electrode;
a first linear polarizer along an outer side surface of the first substrate;
a second substrate having at least one pixel portion corresponding to the pixel region of the first substrate, the pixel portion being divided into first and second areas;
gate and data lines provided on both the first and second areas of the second substrate, the gate and data lines crossing each other;
a first switching element provided at a cross point of the gate and data lines within the first area;
a second switching element formed at a cross point of the gate and data lines within the second area;
a first pixel electrode within the first area connected to the first switching element;
a second pixel electrode within the second area connected to the second switching element;
a first retardation layer having a first phase retardation value formed beneath the first pixel electrode;
a second retardation layer having a second phase retardation value different from the first phase retardation value formed beneath the second pixel electrode;
a second alignment layer provided on the first and second pixel electrodes;
a liquid crystal layer disposed between the first and second alignment layers; and
a second linear polarizer provided along an outer side surface of the second substrate.
2. The device according to claim 1 , wherein the first and second switching elements include thin film transistors, each having a gate electrode, an active layer, a source electrode, and a drain electrode.
3. The device according to claim 1 , wherein the liquid crystal layer includes twisted nematic mode liquid crystal material.
4. The device according to claim 3 , wherein the first area is one of a normally-white mode region and a normally-black mode region, and the second area is one of a normally-black mode region and a normally-white mode region.
5. The device according to claim 1 , wherein the first phase retardation value is about zero and the second phase retardation value is about λ/2.
6. The device according to claim 5 , wherein the first area corresponding to the first retardation layer is a normally-white mode region and the second area corresponding to the second retardation layer is a normally-black mode region.
7. The device according to claim 1 , wherein the liquid crystal layer includes electrically controlled birefringence mode liquid crystal material.
8. The device according to claim 7 , wherein the first phase retardation value is between about 20 nm and about 50 nm and the second phase retardation value is about λ/2.
9. The device according to claim 1 , wherein a polarizing axis of the first linear polarizer is perpendicular to a polarizing axis of the second linear polarizer.
10. The device according to claim 1 , further comprising a gate printed circuit board connected to the gate lines, and first and second data printed circuit boards connected to the data lines.
11. The device according to claim 10 , wherein the first data printed circuit board supplies a signal to one of the first and second areas, and the second data printed circuit board supplies a signal to one of the second and first areas.
12. The device according to claim 11 , further comprising a first gamma correction circuit electrically connected to the first data printed circuit board, and a second gamma correction circuit electrically connected to the second data printed circuit board.
13. A liquid crystal display (LCD) device, comprising:
a first substrate having at least one pixel region defined thereon and a black matrix along a boundary region of the pixel region;
first and second retardation layers beneath the first substrate, the first and second retardation layers each having different phase retardation values;
a common electrode beneath the first and second retardation layers;
a first alignment layer beneath the common electrode;
a first linear polarizer along an outer side surface of the first substrate;
a second substrate having a pixel portion corresponding to the pixel region of the first substrate, the pixel portion divided into first and second areas, the first area corresponding to the first retardation layer and the second area corresponding to the second retardation layer;
gate and data lines provided on the first and second areas of the second substrate;
first and second switching elements provided at crossing points of the gate and data lines of the first and second areas;
first and second pixel electrodes on the second substrate, the first pixel electrode connected to the first switching element and the second pixel electrode connected to the second switching element;
a second alignment layer on the first and second pixel electrodes;
a liquid crystal layer disposed between the first and second alignment layers; and
a second linear polarizer provided along an outer side surface of the second substrate.
14. The device according to claim 13 , wherein the first and second switching elements include thin film transistors, each having a gate electrode, an active layer, a source electrode, and a drain electrode.
15. The device according to claim 13 , wherein the liquid crystal layer includes twisted nematic mode liquid crystal material.
16. The device according to claim 15 , wherein the first area is one of a normally-white mode region and a normally-black mode region, and the second area is one of a normally-black mode region and a normally-white mode region.
17. The device according to claim 13 , wherein a phase retardation value of the first retardation layer is about zero and a phase retardation value of the second retardation layer is about λ/2.
18. The device according to claim 17 , wherein the first area corresponding to the first retardation layer is a normally-white mode region and the second area corresponding to the second retardation layer is a normally-black mode region.
19. The device according to claim 13 , wherein the liquid crystal layer includes electrically controlled birefringence mode liquid crystal material.
20. The device according to claim 19 , wherein a phase retardation value of the first retardation layer is between about 20 nm and about 50 nm and a phase retardation value of the second retardation layer is about λ/2.
21. The device according to claim 13 , wherein a polarizing axis of the first linear polarizer is perpendicular to a polarizing axis of the second linear polarizer.
22. The device according to claim 13 , further comprising a gate printed circuit board connected to the gate lines, and first and second data printed circuit boards connected to the data lines.
23. The device according to claim 22 , wherein the first data printed circuit board supplies a signal to one of the first and second areas and the second data printed circuit board supplies a signal to one of the second and first areas.
24. The device according to claim 23 , further comprising a first gamma correction circuit electrically connected to the first data printed circuit board, and a second gamma correction circuit electrically connected to the second data printed circuit board.
25. A method of fabricating a liquid crystal display (LCD) device, comprising:
forming a black matrix on a first substrate along a boundary region of at least one pixel region defined thereon;
forming a common electrode beneath the first substrate upon which the black matrix is formed;
forming a first alignment layer beneath the common electrode;
forming a first linear polarizer along an outer side surface of the first substrate;
providing a second substrate having at least one pixel portion corresponding to the pixel region of the first substrate, the pixel portion being divided into first and second areas;
forming gate and data lines on both the first and second areas of the second substrate, the gate and data lines crossing each other;
forming a first switching element at a cross point of the gate and data lines within the first area;
forming a second switching element at a cross point of the gate and data lines within the second area;
forming a first pixel electrode within the first area to be connected to the first switching element;
forming a second pixel electrode within the second area to be connected to the second switching element;
forming a first retardation layer having a first phase retardation value beneath the first pixel electrode;
forming a second retardation layer having a second phase retardation value different from the first phase retardation value beneath the second pixel electrode;
forming a second alignment layer on the first and second pixel electrodes;
providing a liquid crystal layer disposed between the first and second alignment layers; and
forming a second linear polarizer along an outer side surface of the second substrate.
26. The method according to claim 25 , wherein the first and second switching elements include thin film transistors, each having a gate electrode, an active layer, a source electrode, and a drain electrode.
27. The method according to claim 25 , wherein the liquid crystal layer includes twisted nematic mode liquid crystal material.
28. The method according to claim 25 , wherein the first area is one of a normally-white mode region and a normally-black mode region, and the second area is one of a normally-black mode region and a normally-white mode region.
29. The method according to claim 25 , wherein the first phase retardation value is about zero and the second phase retardation value is about λ/2.
30. The method according to claim 29 , wherein the first area corresponding to the first retardation layer is a normally-white mode region and the second area corresponding to the second retardation layer is a normally-black mode region.
31. The method according to claim 25 , wherein the liquid crystal layer includes electrically controlled birefringence mode liquid crystal material.
32. The method according to claim 31 , wherein the first phase retardation value is between about 20 nm and about 50 nm and the second phase retardation value is about λ/2.
33. The method according to claim 25 , wherein a polarizing axis of the first linear polarizer is perpendicular to a polarizing axis of the second linear polarizer.
34. A method of fabricating a liquid crystal display (LCD) device, comprising:
forming a black matrix on a first substrate along a boundary region of at least one pixel region;
forming first and second retardation layers beneath the first substrate, the first and second retardation layers each having different phase retardation values;
forming a common electrode beneath the first and second retardation layers;
forming a first alignment layer beneath the common electrode;
forming a first linear polarizer along an outer side surface of the first substrate;
providing a second substrate having a pixel portion corresponding to the pixel region of the first substrate, the pixel portion divided into first and second areas, the first area corresponding to the first retardation layer and the second area corresponding to the second retardation layer;
forming gate and data lines on the first and second areas of the second substrate;
forming first and second switching elements at crossing points of the gate and data lines of the first and second areas;
forming first and second pixel electrodes on the second substrate, the first pixel electrode connected to the first switching element and the second pixel electrode connected to the second switching element;
forming a second alignment layer on the first and second pixel electrodes;
providing a liquid crystal layer between the first and second alignment layers; and
forming a second linear polarizer along an outer side surface of the second substrate.
35. The method according to claim 34 , wherein the first and second switching elements include thin film transistors, each having a gate electrode, an active layer, a source electrode, and a drain electrode.
36. The method according to claim 34 , wherein the liquid crystal layer includes twisted nematic mode liquid crystal material.
37. The method according to claim 34 , wherein the first area is one of a normally-white mode region and a normally-black mode region, and the second area is one of a normally-black mode region and a normally-white mode region.
38. The method according to claim 34 , wherein a phase retardation value of the first retardation layer is about zero and a phase retardation value of the second retardation layer is about λ/2.
39. The method according to claim 34 , wherein the first area corresponding to the first retardation layer is a normally-white mode region and the second area corresponding to the second retardation layer is a normally-black mode region.
40. The method according to claim 34 , wherein the liquid crystal layer includes electrically controlled birefringence mode liquid crystal material.
41. The method according to claim 40 , wherein a phase retardation value of the first retardation layer is between about 20 nm and about 50 nm and a phase retardation value of the second retardation layer is about λ/2.
42. The method according to claim 34 , wherein a polarizing axis of the first linear polarizer is perpendicular to a polarizing axis of the second linear polarizer.