In-plane switching mode liquid crystal display device and method of fabricating the same
View Patent ↗An in-plane switching mode liquid crystal display device includes first and second substrates, a gate line and a data line arranged along first and second directions on the first substrate to define a pixel area, a passivation layer on the first substrate except within the pixel area, a light blocking system on the first substrate and on a stepped portion of the passivation layer adjacent to the data line, a plurality of common electrodes disposed within the pixel area, at least one of the common electrodes overlap a portion of the data line, and a plurality of pixel electrodes disposed within the pixel area, wherein the pixel electrodes and the common electrodes form a lateral electric field.
1. An in-plane switching mode liquid crystal display device, comprising:
first and second substrates;
a gate line and a data line arranged along first and second directions on the first substrate to define a pixel area;
a passivation layer on the first substrate except within the pixel area;
a light blocking system on the first substrate and under a stepped portion of the passivation layer adjacent to the data line;
a plurality of common electrodes disposed within the pixel area, at least one of the common electrodes overlap a portion of the data line; and
a plurality of pixel electrodes disposed within the pixel area,
wherein the pixel electrodes and the common electrodes form a lateral electric field.
2. The device according to claim 1 , further comprising a thin film transistor at a cross portion of the gate and data lines.
3. The device according to claim 1 , wherein the thin film transistor includes:
a gate electrode on the first substrate;
a gate insulating layer on the gate electrode;
a semiconductor layer on the gate insulating layer;
an ohmic contact layer on the semiconductor layer; and
source and drain electrodes on the ohmic contact layer.
4. The device according to claim 3 , wherein the gate insulating layer is formed along an entire surface of the first substrate.
5. The device according to claim 1 , wherein the common electrodes and the pixel electrodes are formed on a common plane.
6. The device according to claim 5 , wherein the common electrodes and the pixel electrodes are formed on the gate insulating layer.
7. The device according to claim 1 , wherein the common electrodes include transparent conductive material.
8. The device according to claim 7 , wherein the transparent conductive material includes at least one of indium tin oxide (ITO) and indium zinc oxide (IZO).
9. The device according to claim 1 , wherein the light blocking system is formed with the gate electrode.
10. The device according to claim 1 , wherein the passivation includes at least an organic material.
11. The device according to claim 10 , wherein the organic material includes at least one of benzocyclobutene and photoacryl.
12. A method of fabricating an in-plane switching mode liquid crystal display device, comprising:
forming a gate line and a data line along first and second directions on a first substrate to define a pixel area;
forming a passivation layer on the first substrate except within the pixel area;
forming a light blocking system on the first substrate and under a stepped portion of the passivation layer adjacent to the data line;
forming a plurality of common electrodes disposed within the pixel area, at least one of the common electrodes overlap a portion of the data line; and
forming a plurality of pixel electrodes disposed within the pixel area,
wherein the pixel electrodes and the common electrodes form a lateral electric field.
13. The method according to claim 12 , further comprising forming a thin film transistor at a cross portion of the gate and data lines.
14. The method according to claim 12 , wherein forming the thin film transistor includes:
forming a gate electrode on the first substrate;
forming a gate insulating layer on the gate electrode;
forming a semiconductor layer on the gate insulating layer;
forming an ohmic contact layer on the semiconductor layer; and
forming source and drain electrodes on the ohmic contact layer.
15. The method according to claim 14 , wherein the gate insulating layer is formed along an entire surface of the first substrate.
16. The method according to claim 12 , wherein the common electrodes and the pixel electrodes are formed on a common plane.
17. The method according to claim 16 , wherein the common electrodes and the pixel electrodes are formed on the gate insulating layer.
18. The method according to claim 12 , wherein the common electrodes include transparent conductive material.
19. The method according to claim 18 , wherein the transparent conductive material includes at least one of indium tin oxide (ITO) and indium zinc oxide (IZO).
20. The method according to claim 12 , wherein the light blocking system and the gate electrode are simultaneously formed.
21. The method according to claim 12 , wherein the passivation includes at least an organic material.
22. The method according to claim 21 , wherein the organic material includes at least one of benzocyclobutene and photoacryl.