Method and apparatus for interleaving signal bits in a digital audio broadcasting system

1. A method for interleaving bits of a digital signal representative of data and/or audio in a digital audio broadcasting system, the method comprising the steps of:

writing a plurality of bits of the digital signal to an internal matrix;

reading the bits from the internal matrix, wherein at least one of the writing and reading steps follows a non-sequential addressing scheme; and

writing the bits to an output matrix.

2. The method of claim 1 , wherein the number of bits in the output matrix is equal to the number of bits in a transfer frame of the digital signal.

3. The method of claim 1 , wherein the bits in the internal matrix are arranged in a plurality of partitions.

4. The method of claim 3 , wherein each of the partitions comprises a plurality of blocks.

5. The method of claim 3 , wherein each of the partitions includes a group of the bits representative of a logical channel.

6. The method of claim 5 , wherein the bits in each logical channel are scrambled.

7. A method of broadcasting digital information representative of data and/or audio in a digital audio broadcasting system, the method comprising the steps of:

receiving a plurality of bits of a digital signal to be transmitted;

writing the bits to an internal matrix;

reading the bits from the internal matrix, wherein at least one of the writing and reading steps follows a non-sequential addressing scheme;

writing the bits to an output matrix;

mapping the bits to a plurality of carrier signals; and

transmitting the carrier signals.

8. The method of claim 7 , wherein the number of bits in the output matrix is equal to the number of bits in a transfer frame of the digital signal.

9. The method of claim 7 , wherein the bits in the internal matrix are arranged in a plurality of partitions.

10. The method of claim 9 , wherein each of the partitions comprises a plurality of blocks.

11. The method of claim 9 , wherein each of the partitions includes a group of the bits representative of a logical channel.

12. The method of claim 11 , wherein the bits in each logical channel are scrambled.

13. The method of claim 7 , further comprising the step of:

channel coding the bits prior to the step of writing the bits of the digital signal to the internal matrix.

14. The method of claim 7 , further comprising the step of:

scrambling the bits prior to the step of writing the bits of the digital signal to the internal matrix.

15. An apparatus for interleaving bits of a digital signal representative of data and/or audio in a digital audio broadcasting system, the apparatus comprising:

means for receiving a plurality of bits of a digital signal to be transmitted;

means for writing the bits to an internal matrix;

means for reading the bits from the internal matrix, wherein at least one of the means for writing and the means for reading follows a non-sequential addressing scheme; and

means for writing the bits to an output matrix.

16. The apparatus of claim 15 , wherein the number of bits in the output matrix is equal to the number of bits in a transfer frame of the digital signal.

17. The apparatus of claim 15 , wherein the bits in the internal matrix are arranged in a plurality of partitions.

18. The apparatus of claim 17 , wherein each of the partitions comprises a plurality of blocks.

19. The apparatus of claim 17 , wherein each of the partitions includes a group of the bits representative of a logical channel.

20. The apparatus of claim 19 , wherein the bits in each logical channel are scrambled.

21. An apparatus of broadcasting digital information representative of data and/or audio in a digital audio broadcasting system, the apparatus comprising:

means for receiving a plurality of bits of a digital signal to be transmitted;

means for writing the bits of the digital signal to an internal matrix;

means for reading the bits from the internal matrix, wherein at least one of the means for writing and the means for reading follows a non-sequential addressing scheme;

means for writing the bits to an output matrix;

means for mapping the bits to a plurality of carrier signals; and

means for transmitting the carrier signals.

22. The apparatus of claim 21 , wherein the number of bits in the output matrix is equal to the number of bits in one of the transfer frames.

23. The apparatus of claim 21 , wherein the bits in the internal matrix are arranged in a plurality of partitions.

24. The apparatus of claim 23 , wherein each of the partitions comprises a plurality of blocks.

25. The apparatus of claim 23 , wherein each of the partitions includes a group of the bits representative of a logical channel.

26. The apparatus of claim 25 , wherein the bits in each logical channel are scrambled.

27. The apparatus of claim 21 , further comprising:

means for channel coding the bits prior to the step of writing the bits of the digital signal to the internal matrix.

28. The apparatus of claim 21 , further comprising:

means for scrambling the bits prior to the step of writing the bits of the digital signal to the internal matrix.

29. A method for deinterleaving received bits of a digital signal representative of data and/or audio in a digital audio broadcasting system, the method comprising the steps of:

writing a plurality of received bits of the digital signal to an internal matrix;

reading the bits from the internal matrix, wherein at least one of the writing and reading steps follows a non-sequential addressing scheme; and

writing the bits to an output matrix.

30. The method of claim 29 , wherein the number of bits in the output matrix is equal to the number of bits in a transfer frame of the digital signal.

31. A method of receiving digital information representative of data and/or audio in a digital audio broadcasting system, the method comprising the steps of:

receiving a plurality of bits of a digital signal;

writing the bits to an internal matrix;

reading the bits from the internal matrix, wherein at least one of the means for writing and means for reading follows a non-sequential addressing scheme;

writing the read bits to an output matrix; and

using the read bits to produce an output signal.

32. The method of claim 31 , wherein the number of bits in the output matrix is equal to the number of bits in a transfer frame of the digital signal.

33. An apparatus for deinterleaving bits of a digital signal representative of data and/or audio in a digital audio broadcasting system, the apparatus comprising:

means for receiving a plurality of bits of a digital signal;

means for writing the bits to an internal matrix;

means for reading the bits from the internal matrix, wherein at least one of the means for writing and means for reading follows a non-sequential addressing scheme;

means for writing the bits of the digital signal to an output matrix; and

means for using the read bits to produce an output signal.

34. The apparatus of claim 33 , wherein the number of bits in the output matrix is equal to the number of bits in a transfer frame of the digital signal.

35. An apparatus for receiving digital information representative of data and/or audio in a digital audio broadcasting system, the apparatus comprising:

a receiver including circuitry for receiving a plurality of bits of a digital signal;

for writing the bits of the digital signal to an internal matrix;

for reading the bits from the internal matrix, wherein at least one of the means for writing and means for reading follows a non-sequential addressing scheme;

for writing the bits of the digital signal to an output matrix; and

for using the read bits to produce an output signal.

36. The apparatus of claim 35 , wherein the number of bits in the output matrix is equal to the number of bits in one of the transfer frames.

37. A method for interleaving bits of a digital signal representative of data and/or audio in a digital audio broadcasting system, the method comprising the steps of;

writing a plurality of bits of the digital signal to an internal matrix in a convolutional interleaver, wherein the plurality of bits are arranged in a plurality of interleaver partitions;

reading the bits from the internal matrix;

writing the bits read from the internal matrix to an output matrix; and

mapping bits from the interleaver partitions to frequency partitions in a radio signal.

38. The method of claim 37 , wherein the interleaver partitions include rows of bits and each row of bits is assigned to one of the frequency partitions.

39. The method of claim 38 , wherein each row of bits is mapped to one of the frequency partitions as a complex vector.

40. The method of claim 38 , wherein the rows of bits are processed sequentially.

41. The method of claim 37 , wherein the plurality of bits includes control data sequence bits, and the control data sequence bits are mapped to a reference subcarrier in the radio signal.

42. The method of claim 37 , wherein at least one of the writing and reading steps follows a non-sequential addressing scheme.

43. The method of claim 37 , wherein the radio signal comprises an orthogonal frequency division multiplexed signal and a row of bits in the matrix is processed for each symbol in the orthogonal frequency division multiplexed signal.

44. The method of claim 37 , wherein the plurality of bits of the digital signal comprises channel coded transfer frames.

45. The method of claim 37 , further comprising the steps of:

translating pairs of the bits from the interleaver partitions and individual bits from the output matrix into complex constellation values; and

applying an amplitude gain factor to the complex constellation values.

46. The method of claim 37 , wherein the pairs of columns in the interleaver partitions are mapped to quadrature phase shift keying modulated subcarriers in the frequency partitions.