Method of fabricating thin film transistor TFT array

1. A method of fabricating a TFT array, comprising the steps of;

forming a gate electrode and using a replacement method of an α-Si seed which is defined by a first mask to deposit a first wiring on the substrate, and defining the gate electrode of the TFT array;

forming a dielectric layer, the α-Si layer, and an N+ layer, the layers being deposited in order, and the dielectric covering the top side of the gate electrode, and the α-Si layer being between the dielectric layer and the N+ Si layer;

using a second mask to define multiple contact windows;

depositing a transparent conducting layer, and the transparent conducting material placed on the multiple contact windows;

defining a source and drain electrodes and using a third mask to define the source electrode and the drain electrode in the TFT array;

etching channel; it using coverage of a fourth mask to etch the component contact window as a conducting channel; and

placing a passivation layer, and depositing a passivation layer, and the fourth mask placed on the passivation layer, and processing etching on the passivation layer of non-fourth mask coverage for implementing TFT array.

2. The method of fabricating a TFT array according to claim 1 , wherein the replacement method is a chemical plating method, that uses a low-resistance metal with stronger oxidation ability than Si, and works with chemical plating method to process oxidation-reduction reaction, and the area of the α-Si definition is replaced by a first conducting metal.

3. The method of fabricating a TFT array according to claim 1 , the process of the defining gate electrode used the deposition methods to define, and a conducting metal depositing deposited on the gate electrode can be made of Cu, Al, Ag, Ni, Ti, W, or MO.

4. The method of fabricating a TFT array according to claim 1 , the process of the forming dielectric layer can use a continuous deposition method to form the dielectric layer with oxide material.

5. The method of fabricating a TFT array according to claim 1 , the process of the forming dielectric layer can use low-pressure chemical vapor deposition (LPCVD), or plasma enhanced chemical deposition PECVD) to implement.

6. The method of fabricating thin a TFT array according to claim 1 , a material of the transparent conducting layer in the process of the depositing transparent conducting layer is Indium Tin Oxide (ITO) or Indium-Doped Zinc Oxide (IZO).

7. The method of fabricating a TFT array according to claim 1 , the process of the defining gate electrode and drain electrode uses stronger oxidation ability in the second conducting metal rather than Si has to implement the replacement, and a partial N+ Si layer is as a N+ Si seed to process oxidation-reduction reaction, and the replaced parts of the N+ Si seed are defined as the source electrode and the drain electrode.

8. The method of fabricating a TFT array according to claim 1 , a second conducting metal is made of Cu, Al, Ag, In, Ti, W, or MO materials.

9. The method of fabricating a TFT array according to claim 1 , the third masking process can use a positive-type of a photo-resist to process shielding.