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App. No. 10/674,240 · Confirmation No. 1888

Arrangement of integrated circuits in a memory module

Abandoned -- Failure to Respond to an Office Action View Publication ↗
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 Code Description Pages PDF
2004-10-29 ABN Abandonment 2 View
2004-04-01 IDS Information Disclosure Statement (IDS) Form (SB08) 3 View
2004-03-29 CTNF Non-Final Rejection 4 View
2004-03-29 892 List of references cited by examiner 1 View
2004-03-29 1449 List of References cited by applicant and considered by examiner 2 View
2004-03-29 FWCLM Index of Claims 1 View
2004-03-29 SRFW Search information including classification, databases and other search related notes 1 View
2004-03-09 WFEE Fee Worksheet (SB06) 1 View
2004-03-01 FWCLM Index of Claims 1 View
2004-03-01 A.PE Preliminary Amendment 3 View
2004-03-01 SPEC Specification 1 View
2004-03-01 REM Applicant Arguments/Remarks Made in an Amendment 1 View
2003-12-04 IDS Information Disclosure Statement (IDS) Form (SB08) 4 View
2003-09-29 TRNA Transmittal of New Application 3 View
2003-09-29 SPEC Specification 11 View
2003-09-29 CLM Claims 1 View
2003-09-29 ABST Abstract 1 View
2003-09-29 DRW Drawings-only black and white line drawings 9 View
2003-09-29 OATH Oath or Declaration filed 1 View
2003-09-29 WFEE Fee Worksheet (SB06) 1 View
2003-09-29 WFEE Fee Worksheet (SB06) 1 View
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Quick Facts
App. No.
10/674,240
Filed
2003-09-29
Pub. No.
US20040057269A1
Examiner
PHAM, LY D
Art Unit
2818