IP Library Granted Patent US 7,432,895
Granted Patent B2
US 7,432,895 · App. 10/677,764 · Granted Oct 7, 2008

Drive for active matrix cholesteric liquid crystal display

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Quick Facts
Patent No.
US 7,432,895
App. No.
10/677,764
Granted
Oct 7, 2008
Kind
B2
Abstract

A method of driving an active matrix cholesteric liquid crystal display that includes a matrix of data and select lines and an array of pixels connected to the data and select lines through active switching elements, a pixel being capable of producing two or more gray levels includes providing a select voltage and a plurality of data voltages, and during a pixel writing cycle, applying the select voltage and the data voltages to the select and data lines of the display to produce only three pixel voltage levels 0, +U and −U, having respective duty cycles and controlling the duty cycles of the pixel voltage levels to determine the gray levels of the pixels, and wherein the average voltage applied to a pixel during the pixel writing cycle is zero.

Claims (21)

1. A method of driving an active matrix cholesteric liquid crystal display that includes a matrix of data and select lines and an array of pixels connected to the data and select lines through active switching elements, a pixel being capable of producing two or more gray levels, comprising:

a) providing a select voltage and a plurality of data voltages; and

b) during a pixel writing cycle, applying the select voltage and the data voltages to the select and data lines of the display to produce only three pixel voltage levels 0, +U and −U, having respective duty cycles and controlling the duty cycles of the pixel voltage levels to determine the gray levels of the pixels, and wherein the average voltage applied to a pixel during the pixel writing cycle is zero.

2. The method claimed in claim 1 , wherein the data voltage levels consist of a zero voltage and a non-zero voltage U.

3. The method claimed in claim 2 , wherein the active matrix liquid crystal display further includes a common electrode connected to all of the pixels, and further comprising the step of applying the zero voltage to the common electrode and the voltage U to the data line to generate the pixel voltage U, and applying the voltage U to the common electrode and the voltage to the data line to generate the pixel voltage −U.

4. The method claimed in claim 1 , wherein the data voltage levels consist of a zero voltage and two non-zero voltages +U and −U.

5. The method claimed in claim 4 , wherein the active matrix liquid crystal display further includes a common electrode connected to all of the pixels, and further comprising the step of applying the zero voltage to the common electrode.

6. The method claimed in claim 1 , wherein a pixel writing cycle includes:

a) a selection portion wherein a non zero pixel voltage is applied to any pixels in the display whose state is to be changed; and

b) a duty cycle portion wherein the duty cycle of the non zero pixel voltages are determined.

7. An active matrix cholesteric liquid crystal display, comprising:

a) an array of pixels each capable of producing two or more gray levels and a corresponding array of active switching elements;

b) a matrix of data and select lines connected to the pixels through the active switching elements; and

c) a driver for applying a select voltage and one of a plurality of data voltages to the select and data lines of the display to produce only three pixel voltage levels 0, +U and −U, having respective duty cycles and controlling the duty cycles of the pixel voltage levels to determine the gray levels of the pixels.

8. The display claimed in claim 7 , wherein the data voltage levels consist of a zero voltage and a non-zero voltage U.

9. The display claimed in claim 8 , further comprising a common electrode connected to all of the pixels, and wherein the driver applies the zero voltage to the common electrode and the voltage U to the data line to generate the pixel voltage U, and applies the voltage U to the common electrode and the voltage to the data line to generate the pixel voltage −U.

10. The display claimed in claim 7 , wherein the data voltage levels consist of a zero voltage and two non-zero voltages +U and −U.

11. The display claimed in claim 10 , wherein the active matrix liquid crystal display further includes a common electrode connected to all of the pixels, and wherein the zero voltage is applied to the common electrode.

12. The display claimed in claim 7 , wherein the driver drives the pixels during a pixel writing cycle that includes:

a) a selection portion wherein a non zero pixel voltage is applied to any pixels in the display whose state is to be changed; and

b) a duty cycle portion wherein the duty cycle of the non zero pixel voltages are determined.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 4, 2019
From: UNIVENTURE MANAGEMENT CONSULTING CO., LTD.
To: IRIS OPTRONICS CO., LTD.
Reel/Frame 047897/0060 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 3, 2019
From: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
To: UNIVENTURE MANAGEMENT CONSULTING CO., LTD.
Reel/Frame 047896/0888 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 18, 2007
From: EASTMAN KODAK COMPANY
To: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
Reel/Frame 019834/0987 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 2, 2003
From: MI, XIANG-DONG
To: EASTMAN KODAK COMPANY
Reel/Frame 014605/0673 →