Method and arrangement for reduced thermal stress between substrates
View Patent ↗A module ( 20 ) can include a first substrate ( 12 ) comprised of a first material, at least a second substrate ( 22 ) comprised of at least a second material, selectively applied solder ( 14 ) of a first composition residing between the first substrate and at least the second substrate, and selectively applied solder ( 16 ) of at least a second composition residing between the first substrate and at least the second substrate. Preferably, no crack will exist in the module as a result of a reflow process of the solder due to the CTE mismatch between the first and second substrates. The different selectively applied solder compositions can have different melting points and can be solder balls, solder paste, solder preform or any other known form of solder.
1. A module, comprising:
a first substrate comprised of a first material;
at least a second substrate comprised of at least a second material;
solder of a first composition residing between the first substrate and at least the second substrate on at least a first area; and
solder of at least a second composition residing between the first substrate and at least the second substrate on at least a separate area from the first area such that the solder of the first composition and the solder of the second composition are vertically separated;
wherein both the solder of the first composition and the solder of the second composition are in a collapsed state.
2. The module of claim 1 , wherein the first substrate has a first coefficient of thermal expansion and the second composition has a second coefficient of thermal expansion.
3. The module of claim 1 , wherein the first substrate is comprised of a printed circuit board material having a coefficient of thermal expansion and the second substrate is a ceramic material having a different coefficient of thermal expansion.
4. The module of claim 1 , wherein the solder of the first composition has a higher melting point solder than the solder of the second composition.
5. The module of claim 4 , wherein the higher melting point solder is comprised of approximately 95.5% Sn, 3.8% Ag and 0.7% Cu.
6. The module of claim 4 , wherein the solder of the first composition is on input/output solder pads.
7. The module of claim 4 , wherein the solder of the second composition is comprised of approximately 57% Bi, 42% Sn, and 1% Ag.
8. The module of claim 4 , wherein the solder of at least the second composition is on ground pads.
9. The module of claim 1 wherein the module is a ball grid array package.
10. The module of claim 1 , wherein the solder of the first composition and the solder of at least the second composition are comprised of solder balls.
11. The module of claim 10 , wherein the solder of the first composition is in a substantially centrally located area on at least one among the first substrate and the second substrate and the solder of at least the second composition is in a substantially peripherally located area about the centrally located area, wherein the solder of the first composition has a higher melting point than the solder of the second composition.
12. The module of claim 1 , wherein the solder of the first composition and the solder of at least the second composition are comprised of solder paste.
13. The module of claim 1 , wherein the solder of the first composition is in a substantially centrally located area on at least one among the first substrate and the second substrate and the solder of at least the second composition is in a substantially peripherally located area about the centrally located area, wherein the solder of the first composition has a higher melting point than the solder of the second composition.
14. The module of claim 1 , wherein at least one among the first substrate and the second substrate further comprises a plurality of solder pads and the solder of the first composition is on a different set of solder pads among the plurality of solder pads than the solder of the second composition.