IP Library Granted Patent US 7,045,376
Granted Patent B2
US 7,045,376 · App. 10/680,295 · Granted May 16, 2006

Method of passivating semiconductor device

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Quick Facts
Patent No.
US 7,045,376
App. No.
10/680,295
Granted
May 16, 2006
Kind
B2
Abstract

A method of passivating a semiconductor device with two types of transistors, e.g., NMOS and PMOS transistors, the semiconductor device is placed in a pressurized sealed chamber and at least two different passivating gases are introduced into the chamber. The two passivating gases can be selected to have one gas suitable for passivating PMOS transistors and the other gas suitable for NMOS transistors.

Claims (13)

1. A method of passivating a semiconductor device, said method comprising:

placing a semiconductor device in a chamber, the semiconductor device having a first type of transistors and a second type of transistors;

introducing a first passivating gas and a second passivating gas into the chamber; and

heating the semiconductor device to a temperature for a period sufficient to passivate the semiconductor device;

wherein

the first passivating gas is introduced into the chamber and the semiconductor device is heated to a temperature for a period sufficient to passivate the first type of transistors, and then the second passivating gas is introduced into the chamber and the semiconductor device is heated to a temperature for a period sufficient to passivate the second type of transistors; and

the first passivating gas is drained out of the chamber by introducing the second passivating gas into the chamber and the pressure of the chamber is greater than 1 atmosphere.

2. The method as claimed in claim 1 , wherein the first passivating gas is H 2 or N 2 .

3. The method as claimed in claim 2 , wherein the second passivating gas is H 2 O or NH 3 .

4. The method as claimed in claim 1 , wherein the first type of transistors are PMOS transistors and the second type of transistors are NMOS transistors.

5. The method as claimed in claim 1 , wherein the semiconductor device comprises a CMOS circuit of an active matrix display device.

6. The method as claimed in claim 1 , wherein the chamber maintains a pressure between 5 atmospheres and 20 atmospheres.

7. The method as claimed in claim 1 , wherein the first type of transistors are PMOS transistors and the first passivating gas is H 2 or N 2 , and the second type of transistors are NMOS transistors and the second passivating gas is H 2 O or NH 3.

Assignments (4)
CHANGE OF NAME Recorded Apr 3, 2014
From: CHIMEI INNOLUX CORPORATION
To: INNOLUX CORPORATION
Reel/Frame 032604/0487 →
MERGER Recorded Feb 15, 2011
From: TPO DISPLAYS CORP.
To: CHIMEI INNOLUX CORPORATION
Reel/Frame 025809/0031 →
CHANGE OF NAME Recorded Oct 22, 2007
From: TOPPOLY OPTOELECTRONICS CORPORATION
To: TPO DISPLAYS CORP.
Reel/Frame 019992/0734 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 8, 2003
From: TSAI, YAW MING; CHANG, SHIH CHANG; DENG, DE HUA; WANG, SHIH PIN
To: TOPPOLY OPTOELECTRONICS CORP.
Reel/Frame 014594/0620 →