Method for restoring CMOS in a jumperless system
View Patent ↗A method for easily restoring CMOS parameters in a computer having a multi-function power button is provided. In one embodiment, the method for restoring CMOS parameter values in a computer includes (a) pressing the power button for a predetermined time delay while the computer is performing a power-on self test (“POST”), thereby placing the computer in an OFF state; and (b) momentarily pressing the power button to turn on the computer. Pressing the power button for four seconds preferably invokes a power button override function. The power button override function unconditionally forces the computer to a “soft-off” state. The BIOS is preferably configured to determine if the power-override function was invoked during the POST in the previous boot-up, and if so, to replace the CMOS parameter values with backup parameter values before proceeding with the current boot-up. The CMOS parameter values are preferably backed up only if they have changed and the BIOS has successfully completed the POST procedure with the changed values. This ensures that the backup values will allow the computer to boot when CMOS parameter restoration is needed.
1. A method for restoring CMOS parameter values in a computer having a power button, wherein the method comprises:
pressing the power button for a predetermined time delay while the computer is performing a power-on self test (“POST”), thereby placing the computer in an OFF state;
momentarily pressing the power button to turn on the computer; and
restoring original CMOS parameters in the computer upon pressing the power button to turn on the computer if pressing the power button for the predetermined time delay while the computer is performing a power-on self test previously occurred.
2. The method of claim 1 , wherein the predetermined time delay is at least four seconds.
3. A method for restoring a CMOS memory to a backup condition in a computer having a power switch, wherein the method comprises:
closing the power switch for at least a predetermined time;
opening the power switch;
momentarily closing the power switch for less than the predetermined time; and
replacing present CMOS parameters of the CMOS memory with backup CMOS parameters in response to closing, opening, and momentarily closing the power switch.
4. The method of claim 3 , wherein said closing the power switch for at least the predetermined time is performed while the computer is performing a power-on self-test (“POST”).
5. The method of claim 4 , wherein said predetermined time is at least four seconds.
6. The method of claim 3 , further comprising:
before said closing the power switch for at least the pre-determined time, momentarily closing the power switch to initiate a POST.