CMOS stereo imaging system and method
View Patent ↗A pair of CMOS image sensors is provided. One of the pair of CMOS image sensors is assigned as a master CMOS image sensor and the other is assigned as a slave CMOS image sensor. The slave CMOS image sensor is synchronized to the master CMOS image sensor during image data acquisition. In one embodiment, the master CMOS image sensor and the slave CMOS image sensor are connected to receive a control signal, which assigns the master CMOS image sensor as master and the slave CMOS image sensor as slave. In another embodiment, the master CMOS image sensor and slave CMOS image sensor are hardwired to assign the master and slave. In yet another embodiment, the data signals from the master CMOS image sensor and slave CMOS image sensor are interleaved.
1. A method for stereo imaging using CMOS image sensors, the method comprising:
providing a pair of CMOS image sensors;
assigning one of the pair of CMOS image sensors as a waster CMOS image sensor and the other as a slave CMOS image sensor; and
synchronizing line-by-line exposure of the slave CMOS image sensor to the master CMOS image sensor during image data acquisition.
2. The method of claim 1 , in which the assigning comprises using a control signal to assign the one of the pair of CMOS image sensors as the master CMOS image sensor.
3. The method of claim 1 , in which the assigning comprises hardwiring the one of the pair of CMOS image sensors as the master CMOS image sensor and the other of the pair of CMOS image sensors as the slave CMOS image sensor.
4. The method of claim 1 , in which the synchronizing comprises synchronizing timing of the slave CMOS image sensor and the master CMOS image sensor within one line.
5. The method of claim 1 , additionally comprising:
generating a master data signal using the master CMOS image sensor;
generating a slave data signal using the slave CMOS image sensor; and
interleaving the master data signal and the slave data signal.
6. The method of claim 1 , additionally comprising:
providing at least one additional CMOS image sensor;
assigning the additional CMOS image sensor as an additional slave CMOS image sensor; and
synchronizing the additional CMOS image sensor so the master CMOS image sensor.
7. A system for stereo imaging using CMOS image sensors, the system comprising:
a master CMOS image sensor connected so receive a control signal, the master CMOS image sensor generating a timing signal; and
a slave CMOS image sensor connected to receive the control signal and the timing signal;
wherein the timing signal synchronizes line-by-line exposure of the slave CMOS image sensor to the master CMOS image sensor during image data acquisition.
8. The system of claim 7 , in which the control signal is a serial control signal and additionally assigns the waster CMOS image sensor as master and the slave CMOS image sensor as slave.
9. The system of claim 7 , additionally comprising a clock generating a first clock signal and a second clock signal offset in phase from the first clock signal, wherein the master CMOS image sensor is connected to receive the first clock signal and the slave CMOS image sensor is connected to receive the second clock signal.
10. The system of claim 9 , in which:
the master CMOS image sensor generates a master data signal;
the slave CMOS image sensor generates a slave data signal;
the system additionally comprises:
a phase locked loop (PLL) connected to receive the second clock signal and generating double speed clock signal; and
an interleaver connected to receive the master data signal, the slave data signal, and the double speed clock signal, the interleaver generating an interleaved data signal.
11. The system of claim 7 , in which the master CMOS image sensor and the slave CMOS image sensor are serially connected to receive the control signal.
12. The system of claim 7 , in which the master CMOS image sensor comprises a first master/slave pin hardwired to assign the master CMOS image sensor as master and the slave CMOS image sensor comprises a second master/slave pin hardwired to assign the slave CMOS image sensor as slave.
13. The system of claim 7 , additionally comprising a clock generating a clock signal, wherein the master CMOS image sensor and the slave CMOS image sensor are connected to receive the clock signal.
14. The system of claim 7 , in which the master CMOS image sensor and the slave CMOS image sensor are connected in parallel to receive the control signal.
15. The system of claim 7 , in which the control signal is a serial control signal comprising an I 2 C (Intelligent Interface Controller) protocol signal.
16. The system of claim 7 , in which the timing signal synchronizes timing of the slave CMOS image sensor and the master CMOS image sensor within one line.
17. The system of claim 7 , additionally comprising at least one additional slave CMOS image sensor connected to receive the control signal and the timing signal.
18. A system for stereo imaging using CMOS image sensors, the system comprising:
a pair of CMOS image sensors;
means for assigning one of the pair of CMOS image sensors as a master CMOS image sensor and for assigning the other of the pair of CMOS image sensors as a slave CMOS image sensor; and
means for synchronizing line-by-line exposure of the slave CMOS image sensor to the master CMOS image sensor during image data acquisition.
19. The system of claim 18 , in which:
the master CMOS image sensor generates a master data signal;
the slave CMOS image sensor generates a slave data signal; and
the system additionally comprises:
an interleaver connected to receive the master data signal and the slave data signal, the interleaver generating an interleaved data signal.
20. The system of claim 18 , additionally comprising:
at least one additional CMOS image sensor;
means for assigning the additional CMOS image sensor as an additional slave CMOS image sensor; and
means for synchronizing the additional CMOS image sensor to the master CMOS image sensor.