Configurable storage device
View Patent ↗An inexpensive, re-configurable storage device for programmable and application specific logic is disclosed. A configurable storage device comprising a storage circuit including at least one output and at least one input capable of changing said output in a well defined response sequence; and a configuration circuit including at least one memory element to control a portion of said storage circuit; and a programmable means of altering said storage circuit response sequence. This allows the user greater flexibility in picking the most desired flip-flop from a variety of choices. The user programmed flip-flop option converts to an application specific conductive pattern with no change in storage device performance.
1. A configurable storage device comprising:
a storage circuit including at least one output and at least one input capable of changing said output in a well defined response sequence; and
a configuration circuit including at least one memory element to control a portion of said storage circuit, wherein the memory element is located above said storage circuit; and
a programmable means of altering said storage circuit response sequence.
2. The device of claim 1 , wherein the storage device is a flip-flop.
3. The device of claim-i, wherein the response sequence is comprised of at least two Characteristic Truth Tables from the set S-R, Clocked S-R, D, T, J-K and Clocked J-K flip-flops.
4. The device of claim 1 , wherein the storage device is a master-slave flip-flop.
5. The device of claim 4 , wherein the response sequence is comprised of at least two Characteristic Truth Tables from the set S-R, Clocked S-R, D, T, J-K and Clocked J-K flip-flops.
6. The device of claim 1 , wherein said memory element is comprised one of volatile and non volatile memory element.
7. The device of claim 1 , wherein said memory element is comprised one of a diode, transistor, thin film device, thin film resistor, thin film capacitor and a thin film transistor.
8. The device of claim 1 , wherein the memory element is selected from one of fuse links, anti-fuse capacitors, SRAM cells, DRAM cells, metal optional links, EPROM cells, EEPROM cells, flash cells, ferro-electric elements, optical elements and magnetic elements.
9. The device of claim 1 further comprising:
a programmable pass-gate in said storage circuit; and
a control signal to turn said pass-gate on or off generated by said memory element and coupled to said pass-gate; and
a configuration access to change data in said memory element to provide said programmable means.
10. The device of claim 1 , wherein said response sequence is comprised of a behavior represented by one of a next state Truth Table, next state Graph, next state Characteristic Equation, and a next state Karnaugh Map.
11. The device of claim 1 further comprising:
a plurality of memory elements in said configuration circuit; and
a plurality of programmable pass-gates in said storage circuit; and
a plurality of control signals to turn said pass-gates on or off generated by said memory elements and coupled to said pass-gates; and
a configuration access to change data in said memory elements to provide said programmable means; and
a plurality of memory bit data sets, each set uniquely programming said storage device to perform one well defined response sequence.
12. A configurable storage device comprising:
one or more storage circuits fabricated on a substrate; and
a configuration circuit including one or more memory elements fabricated substantially above the storage circuits to control a portion of said storage circuits; and
an interconnect layer fabricated substantially above said storage circuits to provide routing to storage circuits and memory circuits;
wherein, the storage circuit response sequence is alterable by the data in the memory elements.
13. The device of claim 12 further comprising:
one or more programmable pass-gates fabricated on said substrate; and
one or more configuration access transistors and memory transistors fabricated on thin-film layers substantially above said substrate; and
a control signal generated by said memory element coupled to gate electrode of said pass-gate; and
a programmable means to change said memory data via said access transistors.
14. A semiconductor storage device, comprising:
one or more storage circuits fabricated on a substrate; and
selectively fabricating either a memory circuit or a conductive pattern substantially above the storage circuits to control a portion of said storage circuits; and
an interconnect and routing layer fabricated substantially above the storage circuits to connect storage circuits and one of the memory circuits or the conductive pattern;
wherein, the storage circuit response sequence is alterable by the data in the memory circuit option; and
wherein, one specific response sequence is customized by said conductive pattern option.
15. The device of claim 14 , wherein the storage circuits contain programmable pass-gates.
16. The device of claim 15 , wherein memory circuit contains programmable memory to configure pass-gates.
17. The device of claim 15 , wherein conductive pattern contains hard wired controls to configure pass-gates.
18. The device of claim 14 , wherein a given configuration of the memory circuit and the corresponding conductive pattern have one or more substantially matching storage circuit performance characteristics.